From: "David E. Box" <david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
To: Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>
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Subject: Re: [PATCH V2] i2c-designware: Add Intel Baytrail PMIC I2C bus support
Date: Tue, 11 Nov 2014 09:11:00 -0800 [thread overview]
Message-ID: <20141111171100.GA6955@pathfinder> (raw)
In-Reply-To: <20141111113255.GC3794@katana>
On Tue, Nov 11, 2014 at 12:32:56PM +0100, Wolfram Sang wrote:
> On Tue, Sep 23, 2014 at 11:40:26AM -0700, David E. Box wrote:
> > This patch implements an I2C bus sharing mechanism between the host and platform
> > hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.
> >
> > On these platforms access to the PMIC must be shared with platform hardware. The
> > hardware unit assumes full control of the I2C bus and the host must request
> > access through a special semaphore. Hardware control of the bus also makes it
> > necessary to disable runtime pm to avoid interfering with hardware transactions.
>
> Can we foresee that other platforms will have similar mechanisms in the
> future?
>
Maybe one other platform. Unlikely there'll be any others. Okay on your
comments below.
Dave
> > +config I2C_BAYTRAIL_SEM
>
> I2C_DESIGNWARE_BAYTRAIL_SEM
>
> > + tristate "Intel Baytrail I2C semaphore support"
> > + depends on I2C_DESIGNWARE_PLATFORM
> > + select I2C_DESIGNWARE_CORE
>
> This select is already covered by I2C_DESIGNWARE_PLATFORM.
>
> > + select IOSF_MBI
> > + help
> > + This driver enables host access to the PMIC I2C bus on select Intel
> > + BayTrail platforms using the X-Powers AXP288 PMIC. This driver is
> > + required for host access to the PMIC on these platforms. You should
> > + probably say Y if you have a BayTrail system, unless you know it uses
> > + a different PMIC. Otherwises critical PMIC functions, like charging,
> > + may not operate.
> > +
> > + This driver should be built as a m if I2C_DESIGNWARE_PLATFORM=m,
> > + and as y if I2C_DESIGNWARE_PLATFORM=y.
>
> That shouldn't be the user's task to ensure. Please enforce this in the
> makefile. Check Documentation/kbuid/makefiles.txt, Section 3.3.
>
> > --- /dev/null
> > +++ b/drivers/i2c/busses/i2c-baytrail-sem.c
> > @@ -0,0 +1,157 @@
> > +/*
> > + * Intel BayTrail PMIC I2C bus semaphore implementaion
> > + * Copyright (c) 2014, Intel Corporation.
>
> Mika, can you have a look at the ACPI part here?
>
> > diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
> > index d66b6cb..13e0809 100644
> > --- a/drivers/i2c/busses/i2c-designware-core.h
> > +++ b/drivers/i2c/busses/i2c-designware-core.h
> > @@ -65,6 +65,8 @@
> > * @ss_lcnt: standard speed LCNT value
> > * @fs_hcnt: fast speed HCNT value
> > * @fs_lcnt: fast speed LCNT value
> > + * has_hw_lock: true if bus access requires hardware lock
> > + * pm_runtime_disabled: true if pm runtime is disabled
>
> Look closely. There is a difference to the entries above.
>
> > @@ -123,3 +127,18 @@ extern void i2c_dw_disable(struct dw_i2c_dev *dev);
> > extern void i2c_dw_clear_int(struct dw_i2c_dev *dev);
> > extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
> > extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
> > +
> > +#if IS_ENABLED(CONFIG_I2C_BAYTRAIL_SEM)
> > +extern int baytrail_i2c_acquire(struct dw_i2c_dev *dev);
> > +extern void baytrail_i2c_release(struct dw_i2c_dev *dev);
> > +extern void baytrail_evaluate_sem(struct dw_i2c_dev *dev);
> > +#define i2c_dw_acquire_ownership(dev) baytrail_i2c_acquire(dev)
> > +#define i2c_dw_release_ownership(dev) baytrail_i2c_release(dev)
> > +#define i2c_dw_eval_lock(dev) baytrail_evaluate_sem(dev)
> i2c_dw_test_ownership_support()?
>
> That doesn't scale in case other platformts will need this. I could
> imagine a struct i2c_dw_ownership_ops() (or whatever name) which gets
> populated according to the matched device.
>
> Thanks,
>
> Wolfram
>
prev parent reply other threads:[~2014-11-11 17:11 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-12 17:36 [PATCH] i2c-designware: Intel BayTrail PMIC I2C bus support David E. Box
[not found] ` <1410543367-6565-1-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-09-15 6:57 ` Maxime Coquelin
[not found] ` <54168DE2.8020303-qxv4g6HH51o@public.gmane.org>
2014-09-15 16:55 ` David E. Box
2014-09-16 9:44 ` Mika Westerberg
[not found] ` <20140916094449.GZ10854-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
2014-09-16 10:53 ` Jacob Pan
2014-09-16 10:58 ` Mika Westerberg
2014-09-17 4:01 ` Li, Aubrey
2014-09-17 11:02 ` One Thousand Gnomes
2014-09-23 18:40 ` [PATCH V2] i2c-designware: Add Intel Baytrail " David E. Box
[not found] ` <1411497626-7984-1-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-09-23 19:00 ` Maxime Ripard
2014-09-23 19:58 ` David E. Box
2014-09-25 9:47 ` Maxime Ripard
[not found] ` <20141007191420.GA25126@pathfinder>
2014-10-09 12:36 ` Maxime Ripard
2014-11-11 11:50 ` Mika Westerberg
2014-12-02 0:09 ` [PATCH V3 0/2] i2c-designware: Baytrail bus locking driver David E. Box
2014-12-02 0:09 ` [PATCH V3 1/2] i2c-designware: Add i2c bus locking support David E. Box
2014-12-03 16:01 ` Mika Westerberg
[not found] ` <20141203160125.GB28857-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
2014-12-04 18:49 ` David E. Box
[not found] ` <1417478973-25522-2-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-12-04 7:59 ` Jarkko Nikula
2014-12-04 18:42 ` David E. Box
2015-01-13 9:48 ` Wolfram Sang
2015-01-14 18:15 ` David E. Box
2014-12-02 0:09 ` [PATCH V3 2/2] i2c-designware: Add Intel Baytrail PMIC I2C bus support David E. Box
2014-12-03 16:10 ` Mika Westerberg
[not found] ` <20141203161046.GC28857-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
2014-12-04 19:11 ` David E. Box
[not found] ` <1417478973-25522-1-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-12-06 3:51 ` [PATCH V3 0/2] i2c-designware: Baytrail bus locking driver Shinya Kuribayashi
2015-01-15 9:12 ` [PATCH V4 0/2] i2c-designware: Add Intel Baytrail pmic i2c bus support David E. Box
[not found] ` <1421313137-1613-1-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-01-15 9:12 ` [PATCH V4 2/2] i2c-designware: Add Intel Baytrail PMIC I2C " David E. Box
[not found] ` <1421313137-1613-3-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-01-22 14:28 ` Mika Westerberg
2015-01-22 20:48 ` David E. Box
2015-01-23 9:32 ` Mika Westerberg
2015-01-23 14:18 ` Wolfram Sang
2015-01-26 11:27 ` [PATCH V4 0/2] i2c-designware: Add Intel Baytrail pmic i2c " Wolfram Sang
2015-01-15 9:12 ` [PATCH V4 1/2] i2c-designware: Add i2c bus locking support David E. Box
[not found] ` <1421313137-1613-2-git-send-email-david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-01-22 14:22 ` Mika Westerberg
2014-11-11 11:32 ` [PATCH V2] i2c-designware: Add Intel Baytrail PMIC I2C bus support Wolfram Sang
2014-11-11 17:11 ` David E. Box [this message]
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