From: Wolfram Sang <wsa@the-dreams.de>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: swarren@wwwdotorg.org, thierry.reding@gmail.com,
andrewc@nvidia.com, gnurou@gmail.com, linux-i2c@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Chaitanya Bandi <bandik@nvidia.com>
Subject: Re: [RFT PATCH 2/2] i2c: tegra: add support for fast plus (FM+) mode clock rate
Date: Fri, 31 Jul 2015 12:43:06 +0200 [thread overview]
Message-ID: <20150731104306.GE1522@katana> (raw)
In-Reply-To: <1435661667-11554-2-git-send-email-ldewangan@nvidia.com>
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On Tue, Jun 30, 2015 at 04:24:27PM +0530, Laxman Dewangan wrote:
> Tegra I2C controller required to configure the clock divisor
> register inside controller to different value based on the clock
> speed. The recommended clock divisor for the I2C controller for
> standard/fast mode is 0x19 and for fast-mode plus is 0x10.
>
> Add support to configure clock divisor register of I2C controller
> based on bus clock rate.
>
> This clock divisor is supported form T114 onwards.
>
> This is based on change done by
> Chaitanya Bandi <bandik@nvidia.com>
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Applied to for-next, thanks!
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next prev parent reply other threads:[~2015-07-31 10:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-30 10:54 [RFT PATCH 1/2] i2c: tegra: update CONFIG_LOAD for new conifiguration Laxman Dewangan
[not found] ` <1435661667-11554-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-06-30 10:54 ` [RFT PATCH 2/2] i2c: tegra: add support for fast plus (FM+) mode clock rate Laxman Dewangan
2015-07-31 10:43 ` Wolfram Sang [this message]
2015-07-08 20:36 ` [RFT PATCH 1/2] i2c: tegra: update CONFIG_LOAD for new conifiguration Stephen Warren
[not found] ` <559D89D8.50500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-07-09 5:40 ` Laxman Dewangan
2015-07-16 10:16 ` Laxman Dewangan
2015-07-31 10:42 ` Wolfram Sang
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