Re: [PATCH] i2c: scx200_acb: avoid I2C bus overclocking.

[Wolfram Sang <wsa@the-dreams.de>]

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On Wed, Jun 03, 2015 at 03:21:35AM +0900, Wolfram Sang wrote:
> On Thu, Apr 23, 2015 at 10:27:50PM +0200, Svenning Sørensen wrote:
> > According to I2C spec, max SCL rate is 100 kHz, but SCx200/CS5536
> > controller is currently driving it at 214 kHz according to my math.
> > 
> > SCL is derived from an input clock of 48 MHz, which must be divided
> > by 480 (240 cycles for each SCL high/low state) to be within spec.
> > 
> > Signed-off-by: Svenning Soerensen <sss@secomea.com>
> 
> Thanks for mentioning that it fixed a problem for you. I needed this
> info.
> 
> > +#define ACBCLK		240	/* 48 MHz / 100 kHz / 2 */
> 
> Can you add a comment where you found the info about 48MHz? Since I
> don't know the hardware at all: Can you imagine that there is even older
> hardware with a clock where 0x70 was suitable?
> 
> > -	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
> > +	outb(ACBCLK | ACBCTL2_ENABLE, ACBCTL2);
> ...
> > -	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
> > +	outb(ACBCLK | ACBCTL2_ENABLE, ACBCTL2);
> 
> For consistency reasons and to be less intrusive, I'd rather keep the
> original chunks.

I just remembered that this driver still has a maintainer :) Adding Jim
to CC. Maybe he has some more info? Would be sad to lose this potential
fix, yet I am careful to not introduce regressions to this old hardware.

Jim: The rest of this small thread can be found here:

http://patchwork.ozlabs.org/patch/464046/

Thanks,

   Wolfram



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