From: Wolfram Sang <wsa@the-dreams.de>
To: Liguo Zhang <liguo.zhang@mediatek.com>
Cc: srv_heupstream@mediatek.com,
Matthias Brugger <matthias.bgg@gmail.com>,
Eddie Huang <eddie.huang@mediatek.com>,
Xudong Chen <xudong.chen@mediatek.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v3] i2c: mediatek: i2c multi transfer optimization
Date: Tue, 12 Apr 2016 23:13:56 +0200 [thread overview]
Message-ID: <20160412211355.GA1526@katana> (raw)
In-Reply-To: <1457375031-3769-1-git-send-email-liguo.zhang@mediatek.com>
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Hi,
thanks for the submission!
On Tue, Mar 08, 2016 at 02:23:51AM +0800, Liguo Zhang wrote:
> Signal complete() in the i2c irq handler after one transfer done,
> and then wait_for_completion_timeout() will return, this procedure
> may cost much time, so only signal complete() when the entire
> transaction has been completed, it will reduce the entire transaction
> time.
>
> Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
I wonder. You have less context switches, yes. On the other hand, you
likely have bigger interrupt latency because you do more stuff in the
interrupt handler. Is it really a gain in the end?
Regards,
Wolfram
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next prev parent reply other threads:[~2016-04-12 21:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 18:23 [PATCH v3] i2c: mediatek: i2c multi transfer optimization Liguo Zhang
2016-04-12 21:13 ` Wolfram Sang [this message]
2016-04-16 4:21 ` liguo zhang
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