From mboxrd@z Thu Jan  1 00:00:00 1970
From: Wolfram Sang <wsa@the-dreams.de>
Subject: Re: [PATCH v2 0/3] i2c: designware-pci: refactor and add Merrifield
 support
Date: Sun, 19 Jun 2016 20:17:43 +0200
Message-ID: <20160619181742.GK2933@tetsubishi>
References: <1466003107-19375-1-git-send-email-andriy.shevchenko@linux.intel.com>
 <20160619174239.GH2933@tetsubishi>
 <1466359691.30123.171.camel@linux.intel.com>
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Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>, Mika Westerberg <mika.westerberg@linux.intel.com>, linux-i2c@vger.kernel.org


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> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* On Intel Merrifield th=
e i2c busses are enumerated [1..7]. So,
> we add
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* 1 to shift the default=
 range. Besides that the first PCI slot
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* provides 4 functions, =
that's why we have to add 0 to the head
> slot
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* and 4 to the tail one.
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* On Intel Merrifield th=
e user visible i2c busses are
> enumerated
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* [1..7]. So, we add 1 t=
o shift the default range. Besides that
> the
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* first PCI slot provide=
s 4 functions, that's why we have to
> add 0 to
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* the fisrt slot and 4 t=
o the next one.
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0*/
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0switch (PCI_SLOT(pdev->de=
vfn)) {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0case 8:
>=20
> Should I send a new patch or you can fold it?

I already pushed out. Also, this patch has line break problems.

So, send an incremental one.


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