* [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
@ 2016-11-30 16:34 Alexander Stein
2016-12-01 7:20 ` Jarkko Nikula
2016-12-01 22:39 ` Wolfram Sang
0 siblings, 2 replies; 3+ messages in thread
From: Alexander Stein @ 2016-11-30 16:34 UTC (permalink / raw)
To: Jarkko Nikula, Andy Shevchenko, Mika Westerberg, Wolfram Sang
Cc: Alexander Stein, linux-i2c
Both Merrifield TRM and Medfield TRM state:
"Both 7-bit and 10-bit addressing modes are supported."
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
Changes in v2:
* Fix typo in commit message
drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 300802e7..d6423cf 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -141,6 +141,7 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 32,
.rx_fifo_depth = 32,
+ .functionality = I2C_FUNC_10BIT_ADDR,
.clk_khz = 25000,
.setup = mfld_setup,
},
@@ -149,6 +150,7 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 64,
.rx_fifo_depth = 64,
+ .functionality = I2C_FUNC_10BIT_ADDR,
.scl_sda_cfg = &mrfld_config,
.setup = mrfld_setup,
},
--
2.7.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
2016-11-30 16:34 [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield Alexander Stein
@ 2016-12-01 7:20 ` Jarkko Nikula
2016-12-01 22:39 ` Wolfram Sang
1 sibling, 0 replies; 3+ messages in thread
From: Jarkko Nikula @ 2016-12-01 7:20 UTC (permalink / raw)
To: Alexander Stein, Andy Shevchenko, Mika Westerberg, Wolfram Sang; +Cc: linux-i2c
On 30.11.2016 18:34, Alexander Stein wrote:
> Both Merrifield TRM and Medfield TRM state:
> "Both 7-bit and 10-bit addressing modes are supported."
>
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> Changes in v2:
> * Fix typo in commit message
>
> drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
2016-11-30 16:34 [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield Alexander Stein
2016-12-01 7:20 ` Jarkko Nikula
@ 2016-12-01 22:39 ` Wolfram Sang
1 sibling, 0 replies; 3+ messages in thread
From: Wolfram Sang @ 2016-12-01 22:39 UTC (permalink / raw)
To: Alexander Stein
Cc: Jarkko Nikula, Andy Shevchenko, Mika Westerberg, Wolfram Sang,
linux-i2c
[-- Attachment #1: Type: text/plain, Size: 349 bytes --]
On Wed, Nov 30, 2016 at 05:34:15PM +0100, Alexander Stein wrote:
> Both Merrifield TRM and Medfield TRM state:
> "Both 7-bit and 10-bit addressing modes are supported."
>
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Applied to for-next, thanks!
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-11-30 16:34 [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield Alexander Stein
2016-12-01 7:20 ` Jarkko Nikula
2016-12-01 22:39 ` Wolfram Sang
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