* [PATCH] i2c: i801: Add support for Intel Gemini Lake
@ 2017-01-31 10:17 Mika Westerberg
2017-02-01 10:38 ` Jean Delvare
0 siblings, 1 reply; 3+ messages in thread
From: Mika Westerberg @ 2017-01-31 10:17 UTC (permalink / raw)
To: Jean Delvare, Wolfram Sang; +Cc: Jarkko Nikula, Mika Westerberg, linux-i2c
Intel Gemini Lake has the same SMBus host controller than Intel Broxton.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
drivers/i2c/busses/i2c-i801.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index e242db43774b..6484fa6dbb84 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -65,6 +65,7 @@
* Lewisburg (PCH) 0xa1a3 32 hard yes yes yes
* Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes
* Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes
+ * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes
*
* Features supported by this driver:
* Software PEC no
@@ -213,6 +214,7 @@
#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292
#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0
+#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4
#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
@@ -1012,6 +1014,7 @@ static const struct pci_device_id i801_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
--
2.11.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] i2c: i801: Add support for Intel Gemini Lake
2017-01-31 10:17 [PATCH] i2c: i801: Add support for Intel Gemini Lake Mika Westerberg
@ 2017-02-01 10:38 ` Jean Delvare
2017-02-01 10:50 ` Mika Westerberg
0 siblings, 1 reply; 3+ messages in thread
From: Jean Delvare @ 2017-02-01 10:38 UTC (permalink / raw)
To: Mika Westerberg; +Cc: Jean Delvare, Wolfram Sang, Jarkko Nikula, linux-i2c
Hi Mika,
On Tue, 31 Jan 2017 13:17:33 +0300, Mika Westerberg wrote:
> Intel Gemini Lake has the same SMBus host controller than Intel Broxton.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> ---
> drivers/i2c/busses/i2c-i801.c | 3 +++
> 1 file changed, 3 insertions(+)
Please also update drivers/i2c/busses/Kconfig and
Documentation/i2c/busses/i2c-i801.
Also please submit the new device to http://pci-ids.ucw.cz/read/PC/8086.
>
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index e242db43774b..6484fa6dbb84 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -65,6 +65,7 @@
> * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes
> * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes
> * Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes
> + * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes
> *
> * Features supported by this driver:
> * Software PEC no
> @@ -213,6 +214,7 @@
> #define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292
> #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
> #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0
> +#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4
> #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
> #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
> #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
> @@ -1012,6 +1014,7 @@ static const struct pci_device_id i801_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
> + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
> { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Thanks,
--
Jean Delvare
SUSE L3 Support
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] i2c: i801: Add support for Intel Gemini Lake
2017-02-01 10:38 ` Jean Delvare
@ 2017-02-01 10:50 ` Mika Westerberg
0 siblings, 0 replies; 3+ messages in thread
From: Mika Westerberg @ 2017-02-01 10:50 UTC (permalink / raw)
To: Jean Delvare; +Cc: Jean Delvare, Wolfram Sang, Jarkko Nikula, linux-i2c
On Wed, Feb 01, 2017 at 11:38:32AM +0100, Jean Delvare wrote:
> Hi Mika,
>
> On Tue, 31 Jan 2017 13:17:33 +0300, Mika Westerberg wrote:
> > Intel Gemini Lake has the same SMBus host controller than Intel Broxton.
> >
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> > ---
> > drivers/i2c/busses/i2c-i801.c | 3 +++
> > 1 file changed, 3 insertions(+)
>
> Please also update drivers/i2c/busses/Kconfig and
> Documentation/i2c/busses/i2c-i801.
OK.
> Also please submit the new device to http://pci-ids.ucw.cz/read/PC/8086.
I will but it need to wait a bit since we don't yet have "marketing"
name for Gemini Lake. It is on my list so I'll do that immediately when
I know the right name.
> >
> > diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> > index e242db43774b..6484fa6dbb84 100644
> > --- a/drivers/i2c/busses/i2c-i801.c
> > +++ b/drivers/i2c/busses/i2c-i801.c
> > @@ -65,6 +65,7 @@
> > * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes
> > * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes
> > * Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes
> > + * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes
> > *
> > * Features supported by this driver:
> > * Software PEC no
> > @@ -213,6 +214,7 @@
> > #define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292
> > #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
> > #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0
> > +#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4
> > #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
> > #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
> > #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
> > @@ -1012,6 +1014,7 @@ static const struct pci_device_id i801_ids[] = {
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
> > + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
> > { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
>
> Signed-off-by: Jean Delvare <jdelvare@suse.de>
>
> Thanks,
> --
> Jean Delvare
> SUSE L3 Support
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-02-01 10:38 ` Jean Delvare
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