From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andi Shyti Subject: Re: [PATCH 0/3] i2c: exynos5: bus recovery implementation Date: Thu, 07 Dec 2017 16:36:07 +0900 Message-ID: <20171207073607.GB1355@gangnam.samsung> References: <20171130143007.30258-1-a.hajda@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Content-disposition: inline In-reply-to: <20171130143007.30258-1-a.hajda@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org To: Andrzej Hajda Cc: Wolfram Sang , Bartlomiej Zolnierkiewicz , Marek Szyprowski , "open list:I2C SUBSYSTEM" , "moderated list:ARM/SAMSUNG EXYNOS ARM ARCHITECTURES" List-Id: linux-i2c@vger.kernel.org Hi Andrzej, > This patchset adds bus recovery functionality to Exynos HSI2C, it is used in > case of transmission timeouts. > Internal tests shows that it significantly improves I2C transmissions. > > Andi, could you take a look at it/test, feedback welcome. > > Later, I will post also patches to MHL chip which uses this functionality. > MHL chip has known bug of being in incorrect state after hard reset, > I2C bus recovery cures it. > > Regards > Andrzej > > > Andrzej Hajda (3): > i2c: exynos5: change internal transmission timeout to 100ms > i2c: exynos5: implement bus recovery functionality > i2c: exynos5: do not check TRANS_STATUS in case of Exynos7 variant Thanks for the patches, they look good and I tested them. You can add for all three Reviewed-by: Andi Shyti Tested-by: Andi Shyti Thanks, Andi