From: Jean Delvare <jdelvare@suse.de>
To: Andrew Cooks <andrew.cooks@opengear.com>
Cc: Wolfram Sang <wsa@the-dreams.de>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
Andrew Cooks <acooks@rationali.st>,
linux-acpi@vger.kernel.org, platypus-sw@opengear.com,
"Tobin C . Harding" <me@tobin.cc>,
Will Wagner <willw@carallon.com>
Subject: Re: [RESEND][PATCH v4 1/3] i2c: piix4: Fix port selection for AMD Family 16h Model 30h
Date: Wed, 24 Jul 2019 10:37:48 +0200 [thread overview]
Message-ID: <20190724103748.078eab19@endymion> (raw)
In-Reply-To: <be68c29f603153cf047cd893c6b9d6423073632d.1519601860.git.andrew.cooks@opengear.com>
Hi Andrew,
Sorry for the delay... What can I say :(
On Mon, 26 Feb 2018 10:28:43 +1000, Andrew Cooks wrote:
> Family 16h Model 30h SMBus controller needs the same port selection fix
> as described and fixed in commit 0fe16195f891 ("i2c: piix4: Fix SMBus port
> selection for AMD Family 17h chips")
>
> commit 6befa3fde65f ("i2c: piix4: Support alternative port selection
> register") also fixed the port selection for Hudson2, but unfortunately
> this is not the exact same device and the AMD naming and PCI Device IDs
> aren't particularly helpful here.
>
> The SMBus port selection register is common to the following Families
> and models, as documented in AMD's publicly available BIOS and Kernel
> Developer Guides:
>
> 50742 - Family 15h Model 60h-6Fh (PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)
> 55072 - Family 15h Model 70h-7Fh (PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)
> 52740 - Family 16h Model 30h-3Fh (PCI_DEVICE_ID_AMD_HUDSON2_SMBUS)
>
> The Hudson2 PCI Device ID (PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) is shared
> between Bolton FCH and Family 16h Model 30h, but the location of the
> SmBus0Sel port selection bits are different:
>
> 51192 - Bolton Register Reference Guide
>
> We distinguish between Bolton and Family 16h Model 30h using the PCI
> Revision ID:
>
> Bolton is device 0x780b, revision 0x15
> Family 16h Model 30h is device 0x780b, revision 0x1F
> Family 15h Model 60h and 70h are both device 0x790b, revision 0x4A.
>
> The following additional public AMD BKDG documents were checked and do
> not share the same port selection register:
>
> 42301 - Family 15h Model 00h-0Fh doesn't mention any
> 42300 - Family 15h Model 10h-1Fh doesn't mention any
> 49125 - Family 15h Model 30h-3Fh doesn't mention any
>
> 48751 - Family 16h Model 00h-0Fh uses the previously supported
> index register SB800_PIIX4_PORT_IDX_ALT at 0x2e
>
> Signed-off-by: Andrew Cooks <andrew.cooks@opengear.com>
> ---
> drivers/i2c/busses/i2c-piix4.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
> (...)
Looks good to me. Unfortunately the patch no longer applies (my fault
obviously), it needs to be rebased on top of commit
24beb83ad289c68bce7c01351cb90465bbb1940a ("i2c-piix4: Add Hygon Dhyana
SMBus support").
I also agree with Tobin's suggestion to remove unneeded parentheses.
Reviewed-by: Jean Delvare <jdelvare@suse.de>
This patch should also address Will Wagner's (Cc'd) complaint in another
thread ("[BUG] i2c_piix4: Hudson2 uses wrong port to access SMBus
controller").
I believe this is stable branch material.
--
Jean Delvare
SUSE L3 Support
next prev parent reply other threads:[~2019-07-24 8:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1519601860.git.andrew.cooks@opengear.com>
2018-02-26 0:28 ` [RESEND][PATCH v4 1/3] i2c: piix4: Fix port selection for AMD Family 16h Model 30h Andrew Cooks
2018-02-26 8:58 ` Tobin C. Harding
2018-02-26 21:21 ` Andrew Cooks
2019-07-24 8:37 ` Jean Delvare [this message]
2019-07-24 9:02 ` Jean Delvare
2018-02-26 0:28 ` [RESEND][PATCH v4 2/3] i2c: piix4: fix probing of reserved ports on AMD Andrew Cooks
2019-07-24 9:43 ` Jean Delvare
2018-02-26 0:28 ` [RESEND][PATCH v4 3/3] i2c: piix4: add ACPI support Andrew Cooks
2018-02-26 8:59 ` Tobin C. Harding
2019-07-24 12:55 ` Jean Delvare
2019-07-24 13:59 ` Jean Delvare
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