From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-i2c@vger.kernel.org, Wolfram Sang <wsa@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 2/3] i2c: designware: Make register offsets all of the same width
Date: Tue, 8 Dec 2020 16:03:36 +0200 [thread overview]
Message-ID: <20201208140337.33236-2-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20201208140337.33236-1-andriy.shevchenko@linux.intel.com>
For the sake of consistency add leading 0 to first register offsets
to make them all of the same width.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/i2c/busses/i2c-designware-core.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index c129074be63c..85307cfa7109 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -41,9 +41,9 @@
/*
* Registers offset
*/
-#define DW_IC_CON 0x0
-#define DW_IC_TAR 0x4
-#define DW_IC_SAR 0x8
+#define DW_IC_CON 0x00
+#define DW_IC_TAR 0x04
+#define DW_IC_SAR 0x08
#define DW_IC_DATA_CMD 0x10
#define DW_IC_SS_SCL_HCNT 0x14
#define DW_IC_SS_SCL_LCNT 0x18
--
2.29.2
next prev parent reply other threads:[~2020-12-08 14:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 14:03 [PATCH v1 1/3] i2c: designware: Switch header to use BIT() and GENMASK() Andy Shevchenko
2020-12-08 14:03 ` Andy Shevchenko [this message]
2020-12-08 14:03 ` [PATCH v1 3/3] i2c: designware: Fix indentation in the header Andy Shevchenko
2020-12-09 15:30 ` Jarkko Nikula
2020-12-09 20:52 ` Wolfram Sang
2020-12-10 9:46 ` Andy Shevchenko
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