* [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms
@ 2022-06-15 19:12 Dinh Nguyen
2022-06-15 19:12 ` [PATCHv4 2/2] dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller Dinh Nguyen
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Dinh Nguyen @ 2022-06-15 19:12 UTC (permalink / raw)
To: jarkko.nikula
Cc: dinguyen, andriy.shevchenko, mika.westerberg, robh+dt, krzk+dt,
linux-i2c, linux-kernel, devicetree
The I2C pins on the SoCFPGA platforms do not go through a GPIO module,
thus cannot be recovered by the default method of by doing a GPIO access.
Only a reset of the I2C IP block can a recovery be successful.
The assignment of the recover_bus needs to get done before the call to
devm_gpiod_get_optional(), otherwise, the assignment is not taking place
because of an error after returning from devm_gpiod_get_optional().
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v4: re-arrange code per Andy Shevchenko's recommendation
v3: simplify the function
update commit message
v2: remove change to MODEL_MASK
s/i2c_custom_scl_recovery/i2c_socfpga_scl_recovery
---
drivers/i2c/busses/i2c-designware-core.h | 1 +
drivers/i2c/busses/i2c-designware-master.c | 50 ++++++++++++++++++---
drivers/i2c/busses/i2c-designware-platdrv.c | 1 +
3 files changed, 46 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 70b80e710990..7b22ec1d6a96 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -303,6 +303,7 @@ struct dw_i2c_dev {
#define MODEL_MSCC_OCELOT BIT(8)
#define MODEL_BAIKAL_BT1 BIT(9)
#define MODEL_AMD_NAVI_GPU BIT(10)
+#define MODEL_SOCFPGA BIT(11)
#define MODEL_MASK GENMASK(11, 8)
/*
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index 44a94b225ed8..6b75a08a1c1f 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -813,10 +813,26 @@ static void i2c_dw_unprepare_recovery(struct i2c_adapter *adap)
i2c_dw_init_master(dev);
}
-static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
+static int i2c_socfpga_scl_recovery(struct i2c_adapter *adap)
+{
+ struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
+
+ bri->prepare_recovery(adap);
+ bri->unprepare_recovery(adap);
+
+ return 0;
+}
+
+static int i2c_dw_init_socfpga_recovery_info(struct dw_i2c_dev *dev,
+ struct i2c_bus_recovery_info *rinfo)
+{
+ rinfo->recover_bus = i2c_socfpga_scl_recovery;
+ return 1;
+}
+
+static int i2c_dw_init_generic_recovery_info(struct dw_i2c_dev *dev,
+ struct i2c_bus_recovery_info *rinfo)
{
- struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
- struct i2c_adapter *adap = &dev->adapter;
struct gpio_desc *gpio;
gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH);
@@ -831,16 +847,38 @@ static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
rinfo->sda_gpiod = gpio;
rinfo->recover_bus = i2c_generic_scl_recovery;
- rinfo->prepare_recovery = i2c_dw_prepare_recovery;
- rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
- adap->bus_recovery_info = rinfo;
dev_info(dev->dev, "running with gpio recovery mode! scl%s",
rinfo->sda_gpiod ? ",sda" : "");
+ return 1;
+}
+
+static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
+{
+ struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
+ struct i2c_adapter *adap = &dev->adapter;
+ int ret;
+
+ switch (dev->flags & MODEL_MASK) {
+ case MODEL_SOCFPGA:
+ ret = i2c_dw_init_socfpga_recovery_info(dev, rinfo);
+ break;
+ default:
+ ret = i2c_dw_init_generic_recovery_info(dev, rinfo);
+ break;
+ }
+ if (ret <= 0)
+ return ret;
+
+ rinfo->prepare_recovery = i2c_dw_prepare_recovery;
+ rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
+ adap->bus_recovery_info = rinfo;
+
return 0;
}
+
static int amd_i2c_adap_quirk(struct dw_i2c_dev *dev)
{
struct i2c_adapter *adap = &dev->adapter;
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 70ade5306e45..b33e015e6732 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -153,6 +153,7 @@ static const struct of_device_id dw_i2c_of_match[] = {
{ .compatible = "snps,designware-i2c", },
{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
+ { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA },
{},
};
MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCHv4 2/2] dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller
2022-06-15 19:12 [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
@ 2022-06-15 19:12 ` Dinh Nguyen
2022-06-15 19:38 ` [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
2022-06-16 11:02 ` Andy Shevchenko
2 siblings, 0 replies; 4+ messages in thread
From: Dinh Nguyen @ 2022-06-15 19:12 UTC (permalink / raw)
To: jarkko.nikula
Cc: dinguyen, andriy.shevchenko, mika.westerberg, robh+dt, krzk+dt,
linux-i2c, linux-kernel, devicetree, Krzysztof Kozlowski
The I2C pins on Intel's SoCFPGA platform are not connected to GPIOs and
thus cannot be recovered by the standard GPIO method.
Document the "intel,socfpga-i2c" binding.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v4: no changes
v3: no changes
v2: Added Acked-by
---
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
index d9293c57f573..a130059e97ab 100644
--- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
@@ -33,6 +33,8 @@ properties:
- const: snps,designware-i2c
- description: Baikal-T1 SoC System I2C controller
const: baikal,bt1-sys-i2c
+ - description: Intel's SoCFPGA I2C controller
+ const: intel,socfpga-i2c
reg:
minItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms
2022-06-15 19:12 [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
2022-06-15 19:12 ` [PATCHv4 2/2] dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller Dinh Nguyen
@ 2022-06-15 19:38 ` Dinh Nguyen
2022-06-16 11:02 ` Andy Shevchenko
2 siblings, 0 replies; 4+ messages in thread
From: Dinh Nguyen @ 2022-06-15 19:38 UTC (permalink / raw)
To: jarkko.nikula
Cc: andriy.shevchenko, mika.westerberg, robh+dt, krzk+dt, linux-i2c,
linux-kernel, devicetree
On 6/15/22 14:12, Dinh Nguyen wrote:
> The I2C pins on the SoCFPGA platforms do not go through a GPIO module,
> thus cannot be recovered by the default method of by doing a GPIO access.
> Only a reset of the I2C IP block can a recovery be successful.
>
> The assignment of the recover_bus needs to get done before the call to
> devm_gpiod_get_optional(), otherwise, the assignment is not taking place
> because of an error after returning from devm_gpiod_get_optional().
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v4: re-arrange code per Andy Shevchenko's recommendation
> v3: simplify the function
> update commit message
> v2: remove change to MODEL_MASK
> s/i2c_custom_scl_recovery/i2c_socfpga_scl_recovery
> ---
> drivers/i2c/busses/i2c-designware-core.h | 1 +
> drivers/i2c/busses/i2c-designware-master.c | 50 ++++++++++++++++++---
> drivers/i2c/busses/i2c-designware-platdrv.c | 1 +
> 3 files changed, 46 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
> index 70b80e710990..7b22ec1d6a96 100644
> --- a/drivers/i2c/busses/i2c-designware-core.h
> +++ b/drivers/i2c/busses/i2c-designware-core.h
> @@ -303,6 +303,7 @@ struct dw_i2c_dev {
> #define MODEL_MSCC_OCELOT BIT(8)
> #define MODEL_BAIKAL_BT1 BIT(9)
> #define MODEL_AMD_NAVI_GPU BIT(10)
> +#define MODEL_SOCFPGA BIT(11)
> #define MODEL_MASK GENMASK(11, 8)
>
> /*
> diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
> index 44a94b225ed8..6b75a08a1c1f 100644
> --- a/drivers/i2c/busses/i2c-designware-master.c
> +++ b/drivers/i2c/busses/i2c-designware-master.c
> @@ -813,10 +813,26 @@ static void i2c_dw_unprepare_recovery(struct i2c_adapter *adap)
> i2c_dw_init_master(dev);
> }
>
> -static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> +static int i2c_socfpga_scl_recovery(struct i2c_adapter *adap)
> +{
> + struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
> +
> + bri->prepare_recovery(adap);
> + bri->unprepare_recovery(adap);
> +
> + return 0;
> +}
> +
> +static int i2c_dw_init_socfpga_recovery_info(struct dw_i2c_dev *dev,
> + struct i2c_bus_recovery_info *rinfo)
> +{
> + rinfo->recover_bus = i2c_socfpga_scl_recovery;
> + return 1;
> +}
> +
> +static int i2c_dw_init_generic_recovery_info(struct dw_i2c_dev *dev,
> + struct i2c_bus_recovery_info *rinfo)
> {
> - struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
> - struct i2c_adapter *adap = &dev->adapter;
> struct gpio_desc *gpio;
>
> gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH);
> @@ -831,16 +847,38 @@ static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> rinfo->sda_gpiod = gpio;
>
> rinfo->recover_bus = i2c_generic_scl_recovery;
> - rinfo->prepare_recovery = i2c_dw_prepare_recovery;
> - rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
> - adap->bus_recovery_info = rinfo;
>
> dev_info(dev->dev, "running with gpio recovery mode! scl%s",
> rinfo->sda_gpiod ? ",sda" : "");
>
> + return 1;
> +}
> +
> +static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> +{
> + struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
> + struct i2c_adapter *adap = &dev->adapter;
> + int ret;
> +
> + switch (dev->flags & MODEL_MASK) {
> + case MODEL_SOCFPGA:
> + ret = i2c_dw_init_socfpga_recovery_info(dev, rinfo);
> + break;
> + default:
> + ret = i2c_dw_init_generic_recovery_info(dev, rinfo);
> + break;
> + }
> + if (ret <= 0)
> + return ret;
> +
> + rinfo->prepare_recovery = i2c_dw_prepare_recovery;
> + rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
> + adap->bus_recovery_info = rinfo;
> +
> return 0;
> }
>
> +
Sorry for this stray newline, let me if you need me to send a v5?
> static int amd_i2c_adap_quirk(struct dw_i2c_dev *dev)
> {
> struct i2c_adapter *adap = &dev->adapter;
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
> index 70ade5306e45..b33e015e6732 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -153,6 +153,7 @@ static const struct of_device_id dw_i2c_of_match[] = {
> { .compatible = "snps,designware-i2c", },
> { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
> { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
> + { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA },
> {},
> };
> MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms
2022-06-15 19:12 [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
2022-06-15 19:12 ` [PATCHv4 2/2] dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller Dinh Nguyen
2022-06-15 19:38 ` [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
@ 2022-06-16 11:02 ` Andy Shevchenko
2 siblings, 0 replies; 4+ messages in thread
From: Andy Shevchenko @ 2022-06-16 11:02 UTC (permalink / raw)
To: Dinh Nguyen
Cc: jarkko.nikula, mika.westerberg, robh+dt, krzk+dt, linux-i2c,
linux-kernel, devicetree
On Wed, Jun 15, 2022 at 02:12:13PM -0500, Dinh Nguyen wrote:
> The I2C pins on the SoCFPGA platforms do not go through a GPIO module,
> thus cannot be recovered by the default method of by doing a GPIO access.
> Only a reset of the I2C IP block can a recovery be successful.
>
> The assignment of the recover_bus needs to get done before the call to
> devm_gpiod_get_optional(), otherwise, the assignment is not taking place
> because of an error after returning from devm_gpiod_get_optional().
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
(yes, assuming stray change goes away)
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v4: re-arrange code per Andy Shevchenko's recommendation
> v3: simplify the function
> update commit message
> v2: remove change to MODEL_MASK
> s/i2c_custom_scl_recovery/i2c_socfpga_scl_recovery
> ---
> drivers/i2c/busses/i2c-designware-core.h | 1 +
> drivers/i2c/busses/i2c-designware-master.c | 50 ++++++++++++++++++---
> drivers/i2c/busses/i2c-designware-platdrv.c | 1 +
> 3 files changed, 46 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
> index 70b80e710990..7b22ec1d6a96 100644
> --- a/drivers/i2c/busses/i2c-designware-core.h
> +++ b/drivers/i2c/busses/i2c-designware-core.h
> @@ -303,6 +303,7 @@ struct dw_i2c_dev {
> #define MODEL_MSCC_OCELOT BIT(8)
> #define MODEL_BAIKAL_BT1 BIT(9)
> #define MODEL_AMD_NAVI_GPU BIT(10)
> +#define MODEL_SOCFPGA BIT(11)
> #define MODEL_MASK GENMASK(11, 8)
>
> /*
> diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
> index 44a94b225ed8..6b75a08a1c1f 100644
> --- a/drivers/i2c/busses/i2c-designware-master.c
> +++ b/drivers/i2c/busses/i2c-designware-master.c
> @@ -813,10 +813,26 @@ static void i2c_dw_unprepare_recovery(struct i2c_adapter *adap)
> i2c_dw_init_master(dev);
> }
>
> -static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> +static int i2c_socfpga_scl_recovery(struct i2c_adapter *adap)
> +{
> + struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
> +
> + bri->prepare_recovery(adap);
> + bri->unprepare_recovery(adap);
> +
> + return 0;
> +}
> +
> +static int i2c_dw_init_socfpga_recovery_info(struct dw_i2c_dev *dev,
> + struct i2c_bus_recovery_info *rinfo)
> +{
> + rinfo->recover_bus = i2c_socfpga_scl_recovery;
> + return 1;
> +}
> +
> +static int i2c_dw_init_generic_recovery_info(struct dw_i2c_dev *dev,
> + struct i2c_bus_recovery_info *rinfo)
> {
> - struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
> - struct i2c_adapter *adap = &dev->adapter;
> struct gpio_desc *gpio;
>
> gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH);
> @@ -831,16 +847,38 @@ static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> rinfo->sda_gpiod = gpio;
>
> rinfo->recover_bus = i2c_generic_scl_recovery;
> - rinfo->prepare_recovery = i2c_dw_prepare_recovery;
> - rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
> - adap->bus_recovery_info = rinfo;
>
> dev_info(dev->dev, "running with gpio recovery mode! scl%s",
> rinfo->sda_gpiod ? ",sda" : "");
>
> + return 1;
> +}
> +
> +static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev)
> +{
> + struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
> + struct i2c_adapter *adap = &dev->adapter;
> + int ret;
> +
> + switch (dev->flags & MODEL_MASK) {
> + case MODEL_SOCFPGA:
> + ret = i2c_dw_init_socfpga_recovery_info(dev, rinfo);
> + break;
> + default:
> + ret = i2c_dw_init_generic_recovery_info(dev, rinfo);
> + break;
> + }
> + if (ret <= 0)
> + return ret;
> +
> + rinfo->prepare_recovery = i2c_dw_prepare_recovery;
> + rinfo->unprepare_recovery = i2c_dw_unprepare_recovery;
> + adap->bus_recovery_info = rinfo;
> +
> return 0;
> }
>
> +
> static int amd_i2c_adap_quirk(struct dw_i2c_dev *dev)
> {
> struct i2c_adapter *adap = &dev->adapter;
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
> index 70ade5306e45..b33e015e6732 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -153,6 +153,7 @@ static const struct of_device_id dw_i2c_of_match[] = {
> { .compatible = "snps,designware-i2c", },
> { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
> { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
> + { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA },
> {},
> };
> MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
> --
> 2.25.1
>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-06-16 11:04 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2022-06-15 19:12 [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
2022-06-15 19:12 ` [PATCHv4 2/2] dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller Dinh Nguyen
2022-06-15 19:38 ` [PATCHv4 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms Dinh Nguyen
2022-06-16 11:02 ` Andy Shevchenko
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