[PATCH] i2c: smbus: support new RAM variant for SPD

[Corentin Labbe <clabbe@baylibre.com>]

On my x05 laptop I got:
Memory type 0x12 not supported yet, not instantiating SPD

Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM.
i801_smbus 0000:00:1f.3: SMBus using polling
i2c i2c-6: 2/2 memory slots populated (from DMI)
at24 6-0050: 256 byte spd EEPROM, read-only
i2c i2c-6: Successfully instantiated SPD at 0x50
at24 6-0051: 256 byte spd EEPROM, read-only
i2c i2c-6: Successfully instantiated SPD at 0x51

And then, I decoded it successfully via decode-dimms.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
The result of decode-dimms could be found at http://kernel.montjoie.ovh/zoo/x05/decode-dimms.txt
Since RAM is DDR, I wanted to add '/* DDR */' comment, but I didnt find any document with
proof that this 0x12 is for DDR.

 drivers/i2c/i2c-smbus.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
index 07c92c8495a3..6dca19c994db 100644
--- a/drivers/i2c/i2c-smbus.c
+++ b/drivers/i2c/i2c-smbus.c
@@ -362,6 +362,7 @@ void i2c_register_spd(struct i2c_adapter *adap)
 	}
 
 	switch (common_mem_type) {
+	case 0x12:
 	case 0x13:	/* DDR2 */
 	case 0x18:	/* DDR3 */
 	case 0x1C:	/* LPDDR2 */
-- 
2.37.4