Re: [PATCH v3 2/5] dt-bindings: i2c: Add hpe,gxp-i2c

Krzysztof Kozlowski
2023-01-22T14:02:58Z

On 20/01/2023 20:01, nick.hawkins@hpe.com wrote:
> From: Nick Hawkins <nick.hawkins@hpe.com>
>
> Document compatibility string to support I2C controller
> in GXP.
>
> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
>
> ---
>
> v3:
> *Provide better description with use of Phandle
> v2:
> *Removed uneccessary size-cells and address-cells
> *Removed phandle from hpe,sysreg-phandle
> *Changed hpe,i2c-max-bus-freq to clock-frequency
> ---
> .../devicetree/bindings/i2c/hpe,gxp-i2c.yaml | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
>
> diff --git a/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
> new file mode 100644
> index 000000000000..63bc69e92d0e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HPE GXP SoC I2C Controller
> +
> +maintainers:
> + - Nick Hawkins <nick.hawkins@hpe.com>
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +properties:
> + compatible:
> + const: hpe,gxp-i2c
> +
> + interrupts:
> + maxItems: 1
> +
> + reg:
> + maxItems: 1
> +
> + clock-frequency:
> + default: 100000
> +
> + hpe,sysreg:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to a global status and enable registers shared
> + between each I2C controller instance. Each bit of the
> + registers represents an individual I2C engine.

But what is the purpose? What is it doing? Why I2C controller needs it?

> +
> +required:
> + - compatible
> + - reg
> + - interrupts

Keep the same order as in properties:

Best regards,
Krzysztof