Re: [PATCH v7 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2

Krzysztof Kozlowski
2023-03-28T11:49:06Z

On 27/03/2023 11:25, Ryan Chen wrote:
> Update ASPEED I2C maintainers email.

Everything is an update. Describe what is wrong in original maintainer
email (e.g. Fix typo in maintainer's name and email).

> Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
> and description for ast2600-i2cv2.
>
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> .../devicetree/bindings/i2c/aspeed,i2c.yaml | 56 +++++++++++++++++--
> 1 file changed, 52 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> index f597f73ccd87..00b92c97f432 100644
> --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> @@ -7,10 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
> title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
>
> maintainers:
> - - Rayn Chen <rayn_chen@aspeedtech.com>
> -
> -allOf:
> - - $ref: /schemas/i2c/i2c-controller.yaml#
> + - Ryan Chen <ryan_chen@aspeedtech.com>
>
> properties:
> compatible:
> @@ -49,6 +46,25 @@ properties:
> description:
> states that there is another master active on this bus
>
> + aspeed,enable-dma:
> + type: boolean
> + description: |
> + I2C bus enable dma mode transfer.
> +
> + ASPEED ast2600 platform equipped with 16 I2C controllers that share a
> + single DMA engine. DTS files can specify the data transfer mode to/from
> + the device, either DMA or programmed I/O. However, hardware limitations
> + may require a DTS to manually allocate which controller can use DMA mode.
> + The "aspeed,enable-dma" property allows control of this.
> +
> + In cases where one the hardware design results in a specific
> + controller handling a larger amount of data, a DTS would likely
> + enable DMA mode for that one controller.
> +
> + aspeed,global-regs:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: The phandle of i2c global register node.
> +
> required:
> - reg
> - compatible
> @@ -57,6 +73,26 @@ required:
>
> unevaluatedProperties: false
>
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: aspeed,ast2600-i2cv2
> +
> + then:
> + properties:
> + reg:
> + minItems: 2
> + required:
> + - aspeed,global-regs
> + else:
> + properties:
> + aspeed,global-regs: false
> + aspeed,enable-dma: false
> +
> +
> examples:
> - |
> #include <dt-bindings/clock/aspeed-clock.h>
> @@ -71,3 +107,15 @@ examples:
> interrupts = <0>;
> interrupt-parent = <&i2c_ic>;
> };
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + i2c1: i2c@80 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "aspeed,ast2600-i2cv2";
> + reg = <0x80 0x80>, <0xc00 0x20>;

Compatible and reg are always first properties in DTS.

> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + aspeed,global-regs = <&i2c_global>;

Best regards,
Krzysztof