Re: [PATCH] i2c:octeon:Add block-mode r/w

[kernel test robot <lkp@intel.com>]

Hi Aryan,

kernel test robot noticed the following build errors:

[auto build test ERROR on wsa/i2c/for-next]
[also build test ERROR on linus/master v6.5 next-20230905]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Aryan-Srivastava/i2c-octeon-Add-block-mode-r-w/20230905-071739
base:   https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/for-next
patch link:    https://lore.kernel.org/r/20230904231439.485925-1-aryan.srivastava%40alliedtelesis.co.nz
patch subject: [PATCH] i2c:octeon:Add block-mode r/w
config: riscv-randconfig-001-20230905 (https://download.01.org/0day-ci/archive/20230905/202309051505.K5sogLFe-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230905/202309051505.K5sogLFe-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202309051505.K5sogLFe-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/i2c/busses/i2c-octeon-core.c:725:8: error: use of undeclared label 'ret'
     725 |                 goto ret;
         |                      ^
   1 error generated.


vim +/ret +725 drivers/i2c/busses/i2c-octeon-core.c

   674	
   675	/* high-level-controller composite block write+write, m[0]len<=2, m[1]len<=1024 */
   676	static int octeon_i2c_hlc_block_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
   677	{
   678		bool set_ext = false;
   679		int i, j, len, ret = 0;
   680		u64 cmd, buf = 0, ext = 0;
   681	
   682		octeon_i2c_hlc_enable(i2c);
   683		octeon_i2c_block_enable(i2c);
   684	
   685		/* Write (size - 1) into block control register */
   686		len = msgs[1].len - 1;
   687		octeon_i2c_writeq_flush((u64)(len), i2c->twsi_base + TWSI_BLOCK_CTL(i2c));
   688	
   689		/* Prepare core command */
   690		cmd = SW_TWSI_V | SW_TWSI_SOVR;
   691		cmd |= (u64)(msgs[0].addr & 0x7full) << SW_TWSI_ADDR_SHIFT;
   692	
   693		if (msgs[0].flags & I2C_M_TEN)
   694			cmd |= SW_TWSI_OP_10_IA;
   695		else
   696			cmd |= SW_TWSI_OP_7_IA;
   697	
   698		if (msgs[0].len == 2) {
   699			cmd |= SW_TWSI_EIA;
   700			ext |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
   701			set_ext = true;
   702			cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT;
   703		} else {
   704			cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
   705		}
   706	
   707		/* Write msg into FIFO buffer */
   708		octeon_i2c_writeq_flush(TWSI_BLOCK_STS_RESET_PTR, i2c->twsi_base + TWSI_BLOCK_STS(i2c));
   709		for (i = 0; i < len; i += 8) {
   710			buf = 0;
   711			for (j = 7; j >= 0; j--)
   712				buf |= (msgs[1].buf[i + (7 - j)] << (8 * j));
   713			octeon_i2c_writeq_flush(buf, i2c->twsi_base + TWSI_BLOCK_FIFO(i2c));
   714		}
   715		if (set_ext)
   716			octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
   717	
   718		/* Send command to core (send data in FIFO) */
   719		octeon_i2c_hlc_int_clear(i2c);
   720		octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
   721	
   722		/* Wait for transaction to complete */
   723		ret = octeon_i2c_hlc_wait(i2c);
   724		if (ret)
 > 725			goto ret;
   726	
   727		cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
   728		if ((cmd & SW_TWSI_R) == 0)
   729			return octeon_i2c_check_status(i2c, false);
   730	
   731		octeon_i2c_block_disable(i2c);
   732		return ret;
   733	}
   734	

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