public inbox for linux-i2c@vger.kernel.org
 help / color / mirror / Atom feed
From: Krishna Yarlagadda <kyarlagadda@nvidia.com>
To: <linux-tegra@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-doc@vger.kernel.org>, <linux-i2c@vger.kernel.org>,
	<linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<corbet@lwn.net>, <andi.shyti@kernel.org>,
	<wsa+renesas@sang-engineering.com>, <ulf.hansson@linaro.org>,
	<adrian.hunter@intel.com>, <digetx@gmail.com>,
	<ldewangan@nvidia.com>, <kyarlagadda@nvidia.com>,
	<mkumard@nvidia.com>
Subject: [RFC PATCH 01/11] Documentation: Introduce config settings framework
Date: Tue, 7 May 2024 04:21:29 +0530	[thread overview]
Message-ID: <20240506225139.57647-2-kyarlagadda@nvidia.com> (raw)
In-Reply-To: <20240506225139.57647-1-kyarlagadda@nvidia.com>

Add documentation for config settings framework utilized by Tegra SOCs.
This framework is used to configure various device registers (I2C, SPI,
etc)  with the optimal/recommended settings for a given operating mode.
For each operating mode there may be various register fields that need
to be configured and so these settings are broken down by register field.

This framework uses device-tree for specifying various register settings
for each operating mode for a given device.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
 Documentation/misc-devices/tegra-cfg.rst | 128 +++++++++++++++++++++++
 MAINTAINERS                              |   7 ++
 2 files changed, 135 insertions(+)
 create mode 100644 Documentation/misc-devices/tegra-cfg.rst

diff --git a/Documentation/misc-devices/tegra-cfg.rst b/Documentation/misc-devices/tegra-cfg.rst
new file mode 100644
index 000000000000..be3926ff9a3e
--- /dev/null
+++ b/Documentation/misc-devices/tegra-cfg.rst
@@ -0,0 +1,128 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===================================
+NVIDIA Tegra Configuration Settings
+===================================
+
+Introduction
+------------
+NVIDIA Tegra SoCs have various I/O controllers and these controllers require
+specific register configurations.
+
+They could be due to changes in:
+ - Functional mode (eg. speed)
+ - Interface properties (eg. signal timings)
+ - Manufacturing characteristics (eg. process/package)
+ - Thermal characteristics
+ - Board characteristics
+
+Some of the configurations can be provided by device specific standard DT
+properties like speed of interface in I2C, rising/falling timing etc. However,
+there are more device specific configurations required to tune the interface
+based on execution mode or other runtime parameters. All such configurations are
+defined as 'config' settings of the device. This configures a device to operate
+with the optimal settings for a particular mode to improve performance,
+stability or reduce power.
+
+These configurations are either static or dynamic:
+ - Static configuration which is set once during device boot and controller
+   reset
+ - Dynamic configuration is applied based on a particular condition like bus
+   speed, controller mode, peripheral connected to controller, SoC and platform
+   characterization
+
+Static configurations are provided as common config setting and dynamic
+configurations are provided as mode/condition specific.
+
+Background
+----------
+Slew rates, tap delay and other calibration parameters for an interface
+controller, are measured through characterization. These values are dynamic
+and requires different values for same property / field.
+
+Use case
+--------
+Tegra device drivers that use these config settings include:
+ - I2C uses config settings to configure setup & hold times, clock divider
+   values.
+ - SDMMC tuning iterations per speed and CQE values can be set with this method.
+
+Device tree
+-----------
+Config settings of a controller are added under a child node
+"config" of the controller's device tree node.
+Further subnodes are created under config for each conditional setting.
+::
+
+  controller@xyz {
+    config {
+      common {
+        reg-field-a = <val-a1>;
+        reg-field-b = <val-b1>;
+        reg-field-c = <val-c1>;
+      };
+      cfg1 {
+        reg-field-a = <val-a2>;
+        reg-field-b = <val-b2>;
+        reg-field-c = <val-c2>;
+      };
+      cfg2 {
+        reg-field-a = <val-a3>;
+        reg-field-b = <val-b3>;
+        reg-field-c = <val-c3>;
+      };
+    };
+  };
+
+:
+ - "config": subnode in device node to hold configuration settings.
+ - "common": static configuration that needs to be applied on controller reset.
+   Register fields under 'common' node are applied during initialization
+   irrespective of any condition.
+ - "cfg1": conditional configuration to be applied when controller is set in
+   specific functional mode. Conditional configs may override existing settings
+   in 'common' or contain settings unique to the config.
+ - Properties defined under config must correspond to a register field of
+   device controller.
+ - Properties are device specific and added to device node.
+
+Example
+-------
+Ex::
+
+  i2c@3160000 {
+    config {
+      common {
+        nvidia,i2c-hs-sclk-high-period = <0x03>;
+        nvidia,i2c-hs-sclk-low-period = <0x08>;
+      };
+      fast {
+        nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+        nvidia,i2c-sclk-high-period = <0x02>;
+        nvidia,i2c-sclk-low-period = <0x02>;
+        nvidia,i2c-bus-free-time = <0x02>;
+        nvidia,i2c-stop-setup-time = <0x02>;
+        nvidia,i2c-start-hold-time = <0x02>;
+        nvidia,i2c-start-setup-time = <0x02>;
+      };
+      fastplus {
+        nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+        nvidia,i2c-sclk-high-period = <0x02>;
+        nvidia,i2c-sclk-low-period = <0x02>;
+        nvidia,i2c-bus-free-time = <0x02>;
+        nvidia,i2c-stop-setup-time = <0x02>;
+        nvidia,i2c-start-hold-time = <0x02>;
+        nvidia,i2c-start-setup-time = <0x02>;
+      };
+      standard {
+        nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+        nvidia,i2c-sclk-high-period = <0x07>;
+        nvidia,i2c-sclk-low-period = <0x08>;
+        nvidia,i2c-bus-free-time = <0x08>;
+        nvidia,i2c-stop-setup-time = <0x08>;
+        nvidia,i2c-start-hold-time = <0x08>;
+        nvidia,i2c-start-setup-time = <0x08>;
+      };
+    };
+  };
+
diff --git a/MAINTAINERS b/MAINTAINERS
index eea74166a2d9..c788ff0506c3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21991,6 +21991,13 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt
 F:	drivers/mtd/nand/raw/tegra_nand.c
 
+TEGRA CONFIG SETTINGS DRIVER
+M:	Thierry Reding <thierry.reding@gmail.com>
+R:	Laxman Dewangan <ldewangan@nvidia.com>
+R:	Krishna Yarlagadda <kyarlagadda@nvidia.com>
+S:	Supported
+F:	Documentation/misc-devices/tegra-cfg.rst
+
 TEGRA PWM DRIVER
 M:	Thierry Reding <thierry.reding@gmail.com>
 S:	Supported
-- 
2.43.2


  reply	other threads:[~2024-05-06 22:52 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-06 22:51 [RFC PATCH 00/11] Introduce Tegra register config settings Krishna Yarlagadda
2024-05-06 22:51 ` Krishna Yarlagadda [this message]
2024-05-06 22:51 ` [RFC PATCH 02/11] soc: tegra: Add config setting framework Krishna Yarlagadda
2024-05-06 22:51 ` [RFC PATCH 03/11] soc: tegra: config settings binding document Krishna Yarlagadda
2024-05-07  6:32   ` Krzysztof Kozlowski
2024-05-24  8:01     ` Thierry Reding
2024-05-06 22:51 ` [RFC PATCH 04/11] i2c: dt-bindings: configuration settings Krishna Yarlagadda
2024-05-07  6:34   ` Krzysztof Kozlowski
2024-05-07 12:35   ` Rob Herring (Arm)
2024-05-06 22:51 ` [RFC PATCH 05/11] i2c: core: Avoid config node enumeration Krishna Yarlagadda
2024-05-07  6:35   ` Krzysztof Kozlowski
2024-05-06 22:51 ` [RFC PATCH 06/11] i2c: tegra: split clock initialization code Krishna Yarlagadda
2024-05-06 22:51 ` [RFC PATCH 07/11] i2c: tegra: config settings for interface timings Krishna Yarlagadda
2024-05-06 22:51 ` [RFC PATCH 08/11] arm64: tegra: I2C " Krishna Yarlagadda
2024-05-06 22:51 ` [RFC PATCH 09/11] sdhci: dt-bindings: configuration settings Krishna Yarlagadda
2024-05-07  6:37   ` Krzysztof Kozlowski
2024-05-06 22:51 ` [RFC PATCH 10/11] mmc: host: tegra: config settings for timing Krishna Yarlagadda
2024-05-06 22:51 ` [RFC PATCH 11/11] arm64: tegra: SDHCI timing settings Krishna Yarlagadda
2024-05-07  6:38 ` [RFC PATCH 00/11] Introduce Tegra register config settings Krzysztof Kozlowski
2024-05-24  7:52   ` Thierry Reding

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240506225139.57647-2-kyarlagadda@nvidia.com \
    --to=kyarlagadda@nvidia.com \
    --cc=adrian.hunter@intel.com \
    --cc=andi.shyti@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=corbet@lwn.net \
    --cc=devicetree@vger.kernel.org \
    --cc=digetx@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=krzk+dt@kernel.org \
    --cc=ldewangan@nvidia.com \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-i2c@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mkumard@nvidia.com \
    --cc=robh@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=ulf.hansson@linaro.org \
    --cc=wsa+renesas@sang-engineering.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox