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From: Jean Delvare <jdelvare@suse.de>
To: Linux I2C <linux-i2c@vger.kernel.org>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Jan Dabros <jsd@semihalf.com>, Andi Shyti <andi.shyti@kernel.org>
Subject: [PATCH 1/3] i2c: designware: Use msgs[0] to validate the slave address
Date: Thu, 18 Sep 2025 16:09:14 +0200	[thread overview]
Message-ID: <20250918160914.47514d3b@endymion> (raw)
In-Reply-To: <20250918160341.39b66013@endymion>

Function i2c_dw_xfer_init() makes use of dev->msg_write_idx to index
into the array of messages. The purpose is to program the controller
with the slave address.

However, this driver only supports transfers where all messages have
the same address. Therefore checking the first message leads to the
same result, without depending on dev->msg_write_idx having been
initialized elsewhere before.

This function was always called with dev->msg_write_idx == 0 anyway,
so this does not change anything, only makes the intentions clearer
and the code more simple.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
---
 drivers/i2c/busses/i2c-designware-master.c |    6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

--- linux-6.16.orig/drivers/i2c/busses/i2c-designware-master.c
+++ linux-6.16/drivers/i2c/busses/i2c-designware-master.c
@@ -254,7 +254,7 @@ static void i2c_dw_xfer_init(struct dw_i
 	__i2c_dw_disable(dev);
 
 	/* If the slave address is ten bit address, enable 10BITADDR */
-	if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {
+	if (msgs[0].flags & I2C_M_TEN) {
 		ic_con = DW_IC_CON_10BITADDR_MASTER;
 		/*
 		 * If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing
@@ -272,8 +272,7 @@ static void i2c_dw_xfer_init(struct dw_i
 	 * Set the slave (target) address and enable 10-bit addressing mode
 	 * if applicable.
 	 */
-	regmap_write(dev->map, DW_IC_TAR,
-		     msgs[dev->msg_write_idx].addr | ic_tar);
+	regmap_write(dev->map, DW_IC_TAR, msgs[0].addr | ic_tar);
 
 	/* Enforce disabled interrupts (due to HW issues) */
 	__i2c_dw_write_intr_mask(dev, 0);
@@ -363,7 +362,6 @@ static int amd_i2c_dw_xfer_quirk(struct
 
 	dev->msgs = msgs;
 	dev->msgs_num = num_msgs;
-	dev->msg_write_idx = 0;
 	i2c_dw_xfer_init(dev);
 
 	/* Initiate messages read/write transaction */

-- 
Jean Delvare
SUSE L3 Support

  reply	other threads:[~2025-09-18 14:09 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 14:03 [PATCH 0/3] i2c: designware: Misc small fixes Jean Delvare
2025-09-18 14:09 ` Jean Delvare [this message]
2025-09-18 14:10 ` [PATCH 2/3] i2c: designware: Extend check for mixed slave addresses Jean Delvare
2025-09-19 17:14   ` Jean Delvare
2025-09-22  8:14     ` [PATCH 2/3 v2] " Jean Delvare
2025-09-22 10:22       ` Jarkko Nikula
2025-09-18 14:13 ` [PATCH 3/3] i2c: designware: Turn models back to enumerated values Jean Delvare
2025-09-18 18:50   ` Andy Shevchenko
2025-09-19  8:38     ` Jean Delvare
2025-09-19 12:13 ` [PATCH 0/3] i2c: designware: Misc small fixes Jarkko Nikula

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