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Sun, 2 Aug 2026 09:54:53 -0400 (EDT) Date: Sun, 2 Aug 2026 15:54:52 +0200 From: Janne Grunau To: Yureka Lilian Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Sasha Finkelstein , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org Subject: Re: [PATCH v2 9/9] arm64: dts: apple: Add minimal t8132 (M4) device trees Message-ID: <20260802135452.GJ806854@robin.jannau.net> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> <20260801-apple-m4-initial-devicetrees-v2-9-5cb07cc275da@cyberchaos.dev> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-9-5cb07cc275da@cyberchaos.dev> On Sat, Aug 01, 2026 at 11:40:39PM +0200, Yureka Lilian wrote: > Added device trees for the following devices: > - apple,j604 - MacBook Pro (14-inch, M4, 2024) > - apple,j623 - iMac (24-inch, 2x USB-C, M4, 2024) > - apple,j624 - iMac (24-inch, 4x USB-C, M4, 2024) > - apple,j713 - MacBook Air (13-inch, M4, 2025) > - apple,j715 - MacBook Air (15-inch, M4, 2025) > - apple,j773g - Mac mini (M4, 2024) > > The device trees have a minimal set of devices limited to CPU cores, > interrupt controller, power states, watchdog, serial, pin controller, > i2c and framebuffer. > The device trees for the notebooks add a PWM controller for the keyboard > LED illumination. > > Using the macOS 26.6 iBoot/firmware, the Mac mini reliably boots on a > single core using the stock kernel. > Booting with smp requires avoiding the wfi and wfit instructions > in the idle loop and `delay()` respectively, since those instructions > cause a loss of architectural state on the secondary cores, and even > then boot is unreliable. > > Signed-off-by: Yureka Lilian > --- > arch/arm64/boot/dts/apple/Makefile | 6 + > arch/arm64/boot/dts/apple/t8132-j604.dts | 35 + > arch/arm64/boot/dts/apple/t8132-j623.dts | 18 + > arch/arm64/boot/dts/apple/t8132-j624.dts | 18 + > arch/arm64/boot/dts/apple/t8132-j713.dts | 35 + > arch/arm64/boot/dts/apple/t8132-j715.dts | 35 + > arch/arm64/boot/dts/apple/t8132-j773g.dts | 25 + > arch/arm64/boot/dts/apple/t8132-jxxx.dtsi | 48 ++ > arch/arm64/boot/dts/apple/t8132-pmgr.dtsi | 1130 +++++++++++++++++++++++++++++ > arch/arm64/boot/dts/apple/t8132.dtsi | 447 ++++++++++++ > 10 files changed, 1797 insertions(+) ... > diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi > new file mode 100644 > index 000000000000..6df6ccdda90e > --- /dev/null > +++ b/arch/arm64/boot/dts/apple/t8132.dtsi > @@ -0,0 +1,447 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +/* > + * Apple T8132 "M4" SoC > + * > + * Copyright The Asahi Linux Contributors > + */ > + > +#include > +#include > +#include > + > +/ { > + compatible = "apple,t8132", "apple,arm-platform"; > + > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu_e0>; > + }; > + core1 { > + cpu = <&cpu_e1>; > + }; > + core2 { > + cpu = <&cpu_e2>; > + }; > + core3 { > + cpu = <&cpu_e3>; > + }; > + core4 { > + cpu = <&cpu_e4>; > + }; > + core5 { > + cpu = <&cpu_e5>; > + }; > + }; > + > + cluster1 { > + core0 { > + cpu = <&cpu_p0>; > + }; > + core1 { > + cpu = <&cpu_p1>; > + }; > + core2 { > + cpu = <&cpu_p2>; > + }; > + core3 { > + cpu = <&cpu_p3>; > + }; > + }; > + }; > + > + cpu_e0: cpu@0 { > + compatible = "apple,donan-e"; > + device_type = "cpu"; > + reg = <0x0 0x0>; > + enable-method = "spin-table"; > + cpu-release-addr = <0 0>; > + next-level-cache = <&l2_cache_0>; missing "i-cache-size" and "d-cache-size". As far as I'm aware they remain unchanged. 128kB i-cache, 64kB d-cache for the e-cores and 192kB i-cache, 128kB d-cache for the p-cores ... > + pmgr_mini: power-management@388280000 { > + compatible = "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x3 0x88280000 0 0x4000>; > + /* child nodes are added in t8132-pmgr.dtsi */ > + }; > + > + wdt: watchdog@3882b0000 { > + compatible = "apple,t8132-wdt", "apple,t8103-wdt"; > + reg = <0x3 0x882b0000 0x0 0x4000>; > + clocks = <&clkref>; > + interrupt-parent = <&aic>; > + interrupts = ; > + }; > + > + pinctrl_nub: pinctrl@3881f0000 { out of order node, it belongs before pmgr_mini in unit-address order Janne