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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cf79b9e059sm1823667a12.19.2024.11.15.11.28.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Nov 2024 11:28:50 -0800 (PST) Message-ID: <37762281-4903-4b2d-8f44-3cc4d988558d@oss.qualcomm.com> Date: Fri, 15 Nov 2024 20:28:47 +0100 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 4/4] i2c: i2c-qcom-geni: Enable i2c controller sharing between two subsystems To: Mukesh Kumar Savaliya , konrad.dybcio@linaro.org, andersson@kernel.org, andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, conor+dt@kernel.org, agross@kernel.org, devicetree@vger.kernel.org, vkoul@kernel.org, linux@treblig.org, dan.carpenter@linaro.org, Frank.Li@nxp.com, konradybcio@kernel.org, bryan.odonoghue@linaro.org, krzk+dt@kernel.org, robh@kernel.org Cc: quic_vdadhani@quicinc.com References: <20241113161413.3821858-1-quic_msavaliy@quicinc.com> <20241113161413.3821858-5-quic_msavaliy@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241113161413.3821858-5-quic_msavaliy@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: SJechhtdLkTJPbKLe2cniYxfZJom4ofV X-Proofpoint-ORIG-GUID: SJechhtdLkTJPbKLe2cniYxfZJom4ofV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411150163 On 13.11.2024 5:14 PM, Mukesh Kumar Savaliya wrote: > Add support to share I2C controller in multiprocessor system in a mutually > exclusive way. Use "qcom,shared-se" flag in a particular i2c instance node > if the usecase requires i2c controller to be shared. Can we read back some value from the registers to know whether such sharing takes place? > Sharing of I2C SE(Serial engine) is possible only for GSI mode as client > from each processor can queue transfers over its own GPII Channel. For > non GSI mode, we should force disable this feature even if set by user > from DT by mistake. The DT is to be taken authoritatively > > I2C driver just need to mark first_msg and last_msg flag to help indicate > GPI driver to take lock and unlock TRE there by protecting from concurrent > access from other EE or Subsystem. > > gpi_create_i2c_tre() function at gpi.c will take care of adding Lock and > Unlock TRE for the respective transfer operations. > > Since the GPIOs are also shared between two SS, do not unconfigure them > during runtime suspend. This will allow other SS to continue to transfer > the data without any disturbance over the IO lines. > > For example, Assume an I2C EEPROM device connected with an I2C controller. > Each client from ADSP and APPS processor can perform i2c transactions > without any disturbance from each other. > > Signed-off-by: Mukesh Kumar Savaliya > --- [...] > } else { > gi2c->gpi_mode = false; > + > + /* Force disable shared SE case for non GSI mode */ > + gi2c->se.shared_geni_se = false; Doing this silently sounds rather odd.. Konrad