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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT052.mail.protection.outlook.com (10.13.177.210) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5482.10 via Frontend Transport; Fri, 29 Jul 2022 11:17:58 +0000 Received: from [10.254.241.52] (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Fri, 29 Jul 2022 06:17:53 -0500 Message-ID: <407919d2-c3e3-68e1-30d5-2d2db00db0dd@amd.com> Date: Fri, 29 Jul 2022 13:17:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v3] i2c: cadence: Add standard bus recovery support Content-Language: en-US To: "Datta, Shubhrajyoti" , Shubhrajyoti Datta , "linux-i2c@vger.kernel.org" CC: "michal.simek@xilinx.com" , "git-dev (AMD-Xilinx)" , Chirag Parekh , "Robert Hancock" References: <20220728055150.18368-1-shubhrajyoti.datta@xilinx.com> <920041df-0ac2-7298-4568-c8bba4a2838c@amd.com> From: Michal Simek In-Reply-To: Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2022 11:17:58.9440 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89fc9ab6-77a5-4bd9-2f37-08da7153fe5f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT052.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1201MB0158 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org On 7/29/22 13:05, Datta, Shubhrajyoti wrote: > [AMD Official Use Only - General] > > > >> -----Original Message----- >> From: Simek, Michal >> Sent: Friday, July 29, 2022 4:26 PM >> To: Shubhrajyoti Datta ; linux- >> i2c@vger.kernel.org >> Cc: michal.simek@xilinx.com; git-dev (AMD-Xilinx) ; >> Chirag Parekh ; Robert Hancock >> >> Subject: Re: [PATCH v3] i2c: cadence: Add standard bus recovery support >> >> >> >> On 7/28/22 07:51, Shubhrajyoti Datta wrote: >>> Hook up the standard GPIO/pinctrl-based recovery support. >>> We are doing the recovery at the beginning on a timeout. >>> >>> Multiple people have contributed to the series. >>> Original patch from Cirag and another one from Robert. >>> >>> Cc: Chirag Parekh >>> Cc: Robert Hancock >>> Signed-off-by: Shubhrajyoti Datta >>> --- >>> v2: >>> Updated the busbusy check on a timeout >>> v3: >>> Added pinctrl_get >>> >>> Did unit testing and probed the scl to see the clock pulses. >> >> Can you please describe testing procedure? What board did you use? >> What was the hardware configuration? > > > Tested on zcu102 . and then I called the recovery in send setup . > Also I had added the prints in the > To confirm that the core was calling the zynqmp pinctrl to set pin mux. > > The scl line was Probed. I could see the clock cycles in the scl line. > > [ 84.286340] zynqmp-pinctrl firmware:zynqmp-firmware:pinctrl: set mux for pin 14 > [ 84.293779] zynqmp-pinctrl firmware:zynqmp-firmware:pinctrl: set mux for pin 15 > [ 84.301266] i2c-core: set_scl_gpio_value 164 1 > [ 84.305807] i2c i2c-0: SCL is set_scl 1 i ia 1 > [ 84.310331] i2c-core: get_scl_gpio_value 158 > [ 84.314681] i2c-core: set_scl_gpio_value 164 0 > [ 84.322519] i2c i2c-0: SCL is set_scl 0 > [ 84.326439] i2c i2c-0: SCL is set_scl 0 i ia 2 > [ 84.330965] i2c-core: set_scl_gpio_value 164 1 > [ 84.335496] i2c i2c-0: SCL is set_scl 1 > [ 84.339418] i2c i2c-0: SCL is set_scl 1 i ia 3 > [ 84.343947] i2c-core: get_scl_gpio_value 158 > [ 84.348302] i2c-core: set_scl_gpio_value 164 0 > [ 84.356135] i2c i2c-0: SCL is set_scl 0 > [ 84.360059] i2c i2c-0: SCL is set_scl 0 i ia 4 > [ 84.364586] i2c-core: set_scl_gpio_value 164 1 > [ 84.369117] i2c i2c-0: SCL is set_scl 1 > [ 84.373037] i2c i2c-0: SCL is set_scl 1 i ia 5 > [ 84.377564] i2c-core: get_scl_gpio_value 158 > [ 84.381914] i2c-core: set_scl_gpio_value 164 0 ok. Thanks. Acked-by: Michal Simek Thanks, Michal