From: Terry Bowman <Terry.Bowman@amd.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>,
linux-watchdog@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
linux-i2c <linux-i2c@vger.kernel.org>,
Wolfram Sang <wsa@kernel.org>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Robert Richter <rrichter@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
sudheesh.mavila@amd.com, "Shah,
Nehal-bakulchandra" <Nehal-bakulchandra.Shah@amd.com>,
Basavaraj Natikar <Basavaraj.Natikar@amd.com>,
Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
Mario Limonciello <Mario.Limonciello@amd.com>
Subject: Re: [PATCH v3 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect
Date: Thu, 20 Jan 2022 07:59:39 -0600 [thread overview]
Message-ID: <40800069-e04f-795d-41a8-db8cb60bb96f@amd.com> (raw)
In-Reply-To: <CAHp75VdtnOuBK1ctkjO59vujopCrQ+MQ_LyBB+Mi2HJk4HaJuQ@mail.gmail.com>
On 1/20/22 5:27 AM, Andy Shevchenko wrote:
> On Thu, Jan 20, 2022 at 1:07 AM Terry Bowman <terry.bowman@amd.com> wrote:
>>
>> The EFCH SMBus controller's base address is determined using details in
>> FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].
>> This code also writes to FCH::PM::ISACONTROL[mmioen] to enable MMIO
>> decoding. These register fields were accessed using cd6h/cd7h port I/O.
>> cd6h/cd7h port I/O is no longer available in later AMD processors.
>> Change base address detection to use MMIO instead of port I/O cd6h/cd7h.
>
> ...
>
>> + if (mmio_cfg.use_mmio) {
>
>> + iowrite32(ioread32(mmio_cfg.addr + 4) | SB800_PIIX4_FCH_PM_DECODEEN_MMIO,
>> + mmio_cfg.addr + 4);
>
> Can you split this to three lines (with the help of a temporary variable)?
Yes.
>
>> + smba_en_lo = ioread8(mmio_cfg.addr);
>> + smba_en_hi = ioread8(mmio_cfg.addr + 1);
>
> This makes me wonder if we can replace these two by defining
>
> u16 smba_en;
>
> (below also may be easily adjusted for it).
>
Yes.
Regards,
Terry
>> + } else {
>> + outb_p(smb_en, SB800_PIIX4_SMB_IDX);
>> + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
>> + outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
>> + smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
>> + }
>>
>> piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);
>
next prev parent reply other threads:[~2022-01-20 13:59 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 23:06 [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Terry Bowman
2022-01-19 23:06 ` [PATCH v3 1/9] kernel/resource: Introduce request_muxed_mem_region() Terry Bowman
2022-01-20 11:16 ` Andy Shevchenko
2022-01-20 13:53 ` Terry Bowman
2022-01-19 23:06 ` [PATCH v3 2/9] i2c: piix4: Replace hardcoded memory map size with a #define Terry Bowman
2022-01-19 23:06 ` [PATCH v3 3/9] i2c: piix4: Move port I/O region request/release code into functions Terry Bowman
2022-01-19 23:06 ` [PATCH v3 4/9] i2c: piix4: Move SMBus controller base address detect into function Terry Bowman
2022-01-19 23:06 ` [PATCH v3 5/9] i2c: piix4: Move SMBus port selection " Terry Bowman
2022-01-19 23:06 ` [PATCH v3 6/9] i2c: piix4: Add EFCH MMIO support to region request and release Terry Bowman
2022-01-19 23:06 ` [PATCH v3 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect Terry Bowman
2022-01-20 11:27 ` Andy Shevchenko
2022-01-20 13:59 ` Terry Bowman [this message]
2022-01-24 21:04 ` Terry Bowman
2022-01-27 21:35 ` Wolfram Sang
2022-01-19 23:06 ` [PATCH v3 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select Terry Bowman
2022-01-20 11:28 ` Andy Shevchenko
2022-01-20 14:00 ` Terry Bowman
2022-01-21 21:02 ` Terry Bowman
2022-01-21 21:07 ` Wolfram Sang
2022-01-19 23:06 ` [PATCH v3 9/9] i2c: piix4: Enable EFCH MMIO for Family 17h+ Terry Bowman
2022-01-20 11:30 ` [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Andy Shevchenko
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