Re: [PATCH 6/6] i2c: davinci: bus recovery procedure to clear the bus

[Philby John <pjohn-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>]

On 03/05/2010 08:50 PM, Griffis, Brad wrote:
>>> Right. I was also hoping to rid of cpu_is_xxx usage. The only other way
>>> I could think of is to add pinmux index into i2c platform data struct.
>>> What do you think is the best approach?
>>>
>>
>> I think passing pinmux index through platform data is fair.
>>
>> Thanks,
>> Sekhar
>
> I recently was told of a clever solution for this issue which I documented here:
>
> http://wiki.davincidsp.com/index.php/I2C_Tips#External_Slave_Device_Hanging_the_Bus_by_Holding_SDA_Low
>
> Basically the solution was to switch to "free data format" and perform a read.  This will cause the I2C to start toggling SCL.  I mention it here because I think the "free data format" mode is available on most processors.  (The only device I know that does NOT support "free data format" is OMAP35x.)  You might have a lot less processor-specific code with this approach and it would be applicable to more devices.
>
> I don't have any time to write the code/patch myself, but I thought I would at least toss the idea out there.
>
> Brad
>

I did go through your document, but what does "free data format" mean? 
It would be good to expand the procedure that enables you to move into 
this mode. If this wouldn't require modfying pinmux settings shouldn't 
it be part of the core i2c implementation?

At present we follow the i2c spec. recovery procedure which you 
explained in method 1, and as per AN10216-01 I2C Manual is ...

•SDA line is then non usable anymore because of the
“Slave-Transmitter”mode.
•Methods to recover the SDA line are:
–Reset the slave device (assuming the device has a Reset pin)
–Use a bus recovery sequence to leave the “Slave-Transmitter” mode
•Bus recovery sequence is done as following:
1-Send 9 clock pulses on SCL line
2-Ask the master to keep SDA High until the “Slave-Transmitter” releases
the SDA line to perform the ACK operation
3-Keeping SDA High during the ACK means that the “Master-Receiver”does
not acknowledge the previous byte receive
4-The “Slave-Transmitter” then goes in an idle state
5-The master then sends a STOP command initializing completely the bus

Regards,
Philby