From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Fuckner Subject: Re: Decode dimms on dual socket machines Date: Wed, 13 Apr 2011 12:06:59 +0200 Message-ID: <4DA575C3.1050100@fuckner.net> References: <4DA4250A.3060907@fuckner.net> <20110412132611.045ace21@endymion.delvare> <4DA44B05.906@fuckner.net> <20110412155345.4644e51c@endymion.delvare> <4DA53F22.5020105@gmx.de> <20110413103952.68bdb6fa@endymion.delvare> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20110413103952.68bdb6fa-R0o5gVi9kd7kN2dkZ6Wm7A@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Jean Delvare Cc: Michael Lawnick , linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-i2c@vger.kernel.org On 04/13/2011 10:39 AM, Jean Delvare wrote: >> The challenge will be to detect which of the 8 supported devices ( >> pca_9540, pca_9542, pca_9543, pca_9544, pca_9545, pca_9546, pca_9547, >> pca_9548) is actually to be used. > > In Michael's case it is irrelevant anyway, as the information he found > meanwhile clearly indicates that bus multiplexing is achieved by GPIOs > (most certainly on the ICH10) and not an PCA954x chip. The chip at 0x70 > is probably the Intel 5500 IOH. Supermicro just gave me the following information: To access all SPDs, you have to pull low GPIO49 (IO_0x528 bit 17) first. Then pull low GPIO52 (IO_0x528 bit 20) to access first CPU memory(0x50~0x55); pull high GPIO52 to access 2nd CPU memory(0x50~0x55). I can't find anything about GPIO49/52,53 in Datasheet for 5500/5520 chipset http://www.intel.com/assets/pdf/datasheet/321328.pdf So it is probably connected to ICH10 http://www.intel.com/Assets/PDF/datasheet/319973.pdf but I don't know how to use this information Regards, Michael!