From: Ben Dooks <ben.dooks@codethink.co.uk>
To: Marek Vasut <marex@denx.de>
Cc: "Fabio Estevam" <fabio.estevam@freescale.com>,
"Wolfgang Denk" <wd@denx.de>, "Detlev Zundel" <dzu@denx.de>,
"Stefano Babic" <sbabic@denx.de>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Wolfram Sang" <w.sang@pengutronix.de>,
linux-i2c@vger.kernel.org,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Shawn Guo" <shawn.guo@linaro.org>,
"Dong Aisheng" <b29396@freescale.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] MXS: Set I2C timing registers for mxs-i2c
Date: Mon, 28 May 2012 11:55:56 +0100 [thread overview]
Message-ID: <4FC359BC.8080606@codethink.co.uk> (raw)
In-Reply-To: <1338084656-11961-1-git-send-email-marex@denx.de>
On 27/05/12 03:10, Marek Vasut wrote:
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
>
> Signed-off-by: Marek Vasut<marex@denx.de>
> Cc: Detlev Zundel<dzu@denx.de>
> CC: Dong Aisheng<b29396@freescale.com>
> CC: Fabio Estevam<fabio.estevam@freescale.com>
> Cc: Linux ARM kernel<linux-arm-kernel@lists.infradead.org>
> Cc: linux-i2c@vger.kernel.org
> CC: Sascha Hauer<s.hauer@pengutronix.de>
> CC: Shawn Guo<shawn.guo@linaro.org>
> Cc: Stefano Babic<sbabic@denx.de>
> CC: Uwe Kleine-König<u.kleine-koenig@pengutronix.de>
> Cc: Wolfgang Denk<wd@denx.de>
> Cc: Wolfram Sang<w.sang@pengutronix.de>
> ---
> Documentation/devicetree/bindings/i2c/i2c-mxs.txt | 1 +
> arch/arm/boot/dts/imx28.dtsi | 2 +
> drivers/i2c/busses/i2c-mxs.c | 64 +++++++++++++++++++++
> 3 files changed, 67 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> index 1bfc02d..790b5c6 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> @@ -4,6 +4,7 @@ Required properties:
> - compatible: Should be "fsl,<chip>-i2c"
> - reg: Should contain registers location and length
> - interrupts: Should contain ERROR and DMA interrupts
> +- speed: Speed of the bus in kHz (400 or 100 are supported)
>
> Examples:
>
> diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> index 4634cb8..d927155 100644
> --- a/arch/arm/boot/dts/imx28.dtsi
> +++ b/arch/arm/boot/dts/imx28.dtsi
> @@ -381,6 +381,7 @@
> compatible = "fsl,imx28-i2c";
> reg =<0x80058000 2000>;
> interrupts =<111 68>;
> + fsl,speed =<400>;
> status = "disabled";
> };
>
> @@ -390,6 +391,7 @@
> compatible = "fsl,imx28-i2c";
> reg =<0x8005a000 2000>;
> interrupts =<110 69>;
> + fsl,speed =<400>;
> status = "disabled";
> };
Is there not a standard speed setting in the i2c binding?
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
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next prev parent reply other threads:[~2012-05-28 10:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-27 2:10 [PATCH 1/2] MXS: Set I2C timing registers for mxs-i2c Marek Vasut
2012-05-28 10:55 ` Ben Dooks [this message]
[not found] ` <4FC359BC.8080606-4yDnlxn2s6sWdaTGBSpHTA@public.gmane.org>
2012-05-29 6:46 ` Marek Vasut
[not found] ` <201205290846.53960.marex-ynQEQJNshbs@public.gmane.org>
2012-06-02 6:48 ` Wolfram Sang
[not found] ` <1338084656-11961-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-05-27 2:10 ` [PATCH 2/2] MXS: Implement DMA support into mxs-i2c Marek Vasut
[not found] ` <1338084656-11961-2-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-06-06 3:47 ` Shawn Guo
2012-06-06 2:53 ` [PATCH 1/2] MXS: Set I2C timing registers for mxs-i2c Shawn Guo
-- strict thread matches above, loose matches on Subject: below --
2012-06-29 8:24 Marek Vasut
[not found] ` <1340958243-2332-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-06-29 9:06 ` Dong Aisheng
[not found] ` <20120629090602.GI5844-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2012-06-29 9:33 ` Marek Vasut
[not found] ` <201206291133.09379.marex-ynQEQJNshbs@public.gmane.org>
2012-06-29 9:39 ` Dong Aisheng
[not found] ` <20120629093942.GM5844-Fb7DQEYuewWctlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2012-06-29 10:03 ` Marek Vasut
2012-06-29 11:47 ` Shawn Guo
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