Re: [PATCH 1/2] i2c: tegra: Add logic to support different register offsets

[Jon Hunter <jonathanh@nvidia.com>]

On 01/10/2025 16:36, Kartik Rajput wrote:
> Tegra410 use different offsets for existing I2C registers, update
> the logic to use appropriate offsets per SoC.
> 
> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
> ---
>   drivers/i2c/busses/i2c-tegra.c | 499 ++++++++++++++++++++++-----------
>   1 file changed, 334 insertions(+), 165 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 038809264526..1e26d67cbd30 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c

...

>   /*
>    * msg_end_type: The bus control which needs to be sent at end of transfer.
>    * @MSG_END_STOP: Send stop pulse.
> @@ -219,6 +322,9 @@ enum msg_end_type {
>    *		timing settings.
>    * @has_hs_mode_support: Has support for high speed (HS) mode transfers.
>    * @has_mutex: Has mutex register for mutual exclusion with other firmwares or VMs.
> + * @is_dvc: This instance represents the DVC I2C controller variant.
> + * @is_vi: This instance represents the VI I2C controller variant.
> + * @regs: Register offsets for the specific SoC variant.
>    */
>   struct tegra_i2c_hw_feature {
>   	bool has_continue_xfer_support;
> @@ -247,6 +353,9 @@ struct tegra_i2c_hw_feature {
>   	bool has_interface_timing_reg;
>   	bool has_hs_mode_support;
>   	bool has_mutex;
> +	bool is_dvc;
> +	bool is_vi;
> +	const struct tegra_i2c_regs *regs;
>   };


I think it could be better to have a 'variant' flag for these is_dvc and 
is_vi variables because they are mutually exclusive.

Jon

-- 
nvpublic