From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
mkarthik@nvidia.com, smohammed@nvidia.com, talho@nvidia.com
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-i2c@vger.kernel.org
Subject: Re: [PATCH V13 3/5] i2c: tegra: Add DMA support
Date: Wed, 6 Feb 2019 18:02:42 +0300 [thread overview]
Message-ID: <4ecd3894-a1cb-20dd-8675-26e6e84254e7@gmail.com> (raw)
In-Reply-To: <1549464441-1836-3-git-send-email-skomatineni@nvidia.com>
06.02.2019 17:47, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mode needs full intervention of CPU to fill or empty FIFO's
> and also need to service multiple data requests interrupt for the
> same transaction. This adds delay between data bytes of the same
> transfer when CPU is fully loaded and some slave devices has
> internal timeout for no bus activity and stops transaction to
> avoid bus hang. DMA mode is helpful in such cases.
>
> DMA mode is also helpful for Large transfers during downloading or
> uploading FW over I2C to some external devices.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
[snip]
> +static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev,
> + size_t len)
> +{
> + u32 val, reg;
> + u8 dma_burst = 0;
> + struct dma_slave_config slv_config = {0};
> + struct dma_chan *chan;
> + int ret;
> +
> + if (i2c_dev->hw->has_mst_fifo)
> + reg = I2C_MST_FIFO_CONTROL;
> + else
> + reg = I2C_FIFO_CONTROL;
> + val = i2c_readl(i2c_dev, reg);
> +
> + if (i2c_dev->is_curr_dma_xfer) {
> + if (len & 0xF)
> + dma_burst = 1;
> + else if (len & 0x10)
> + dma_burst = 4;
> + else
> + dma_burst = 8;
> +
> + if (i2c_dev->msg_read) {
> + chan = i2c_dev->rx_dma_chan;
> + slv_config.src_addr = i2c_dev->base_phys +
> + tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO);
> + slv_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> + slv_config.src_maxburst = dma_burst;
> +
> + if (i2c_dev->hw->has_mst_fifo)
> + val |= I2C_MST_FIFO_CONTROL_RX_TRIG(dma_burst);
> + else
> + val |= I2C_FIFO_CONTROL_RX_TRIG(dma_burst);
> + } else {
> + chan = i2c_dev->tx_dma_chan;
> + slv_config.dst_addr = i2c_dev->base_phys +
> + tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO);;
Two ";;" at the end.
[snip]
Good news: DVC I2C works now and tps6586x probes fine! :)
Bad news: atmel-touch still has same problems as in V12 :(
DMA-only V13: http://dpaste.com/0XJ1Z8G.txt
next prev parent reply other threads:[~2019-02-06 15:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-06 14:47 [PATCH V13 1/5] i2c: tegra: sort all the include headers alphabetically Sowjanya Komatineni
2019-02-06 14:47 ` [PATCH V13 2/5] i2c: tegra: add bus clear Master Support Sowjanya Komatineni
2019-02-06 14:47 ` [PATCH V13 3/5] i2c: tegra: Add DMA support Sowjanya Komatineni
2019-02-06 15:02 ` Dmitry Osipenko [this message]
2019-02-06 15:15 ` Sowjanya Komatineni
2019-02-06 15:55 ` Sowjanya Komatineni
2019-02-06 16:07 ` Dmitry Osipenko
2019-02-06 16:32 ` Dmitry Osipenko
2019-02-06 16:38 ` Sowjanya Komatineni
2019-02-06 16:41 ` Dmitry Osipenko
2019-02-06 16:41 ` Thierry Reding
2019-02-06 16:56 ` Sowjanya Komatineni
2019-02-06 14:47 ` [PATCH V13 4/5] i2c: tegra: update transfer timeout Sowjanya Komatineni
2019-02-06 14:47 ` [PATCH V13 5/5] i2c: tegra: add i2c interface timing support Sowjanya Komatineni
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