From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dmitry Osipenko Subject: Re: [PATCH 1/2] i2c: tegra: Maintain CPU endianness Date: Mon, 26 Jan 2015 19:11:46 +0300 Message-ID: <54C66742.7000500@gmail.com> References: <1421756555-20266-1-git-send-email-digetx@gmail.com> <20150122074001.GB427@ulmo> <54C115D1.10206@gmail.com> <54C12010.8040504@gmail.com> <54C130EA.2050505@gmail.com> <20150123094552.GD3835@ulmo> <54C24C2B.1070907@gmail.com> <54C2601A.7000005@gmail.com> <20150126160339.GD13494@katana> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <20150126160339.GD13494@katana> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Wolfram Sang Cc: Thierry Reding , Alexandre Courbot , Stephen Warren , Laxman Dewangan , Ben Dooks , Bob Mottram , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Linux Kernel Mailing List List-Id: linux-i2c@vger.kernel.org 26.01.2015 19:03, Wolfram Sang =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > >> Gaahh! I'm sure it wasn't working before! I'll make more testing and= send v3 >> without "val =3D 0", if all will be fine. > > Please either send V3 or explicitly say V2 is OK. No need to hurry, j= ust > saying that I am waiting for updates here... > Sure! --=20 Dmitry