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Wed, 10 Jun 2026 23:26:39 -0700 (PDT) X-Received: by 2002:a05:7022:128c:b0:137:64ad:a62e with SMTP id a92af1059eb24-13842400ef8mr899942c88.30.1781159198714; Wed, 10 Jun 2026 23:26:38 -0700 (PDT) Received: from [192.168.0.5] ([49.204.107.49]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13842fa5f9asm919602c88.8.2026.06.10.23.26.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Jun 2026 23:26:38 -0700 (PDT) Message-ID: <5a3aeed3-a141-4691-a8f0-fea03aaf59a3@oss.qualcomm.com> Date: Thu, 11 Jun 2026 11:56:29 +0530 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 00/13] Enable I2C on SA8255p Qualcomm platforms To: Bjorn Andersson Cc: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, prasad.sodagudi@oss.qualcomm.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, jyothi.seerapu@oss.qualcomm.com, chiluka.harish@oss.qualcomm.com References: <20260227061544.1785978-1-praveen.talari@oss.qualcomm.com> Content-Language: en-US From: Praveen Talari In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=PZPPQChd c=1 sm=1 tr=0 ts=6a2a5520 cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=uEP1mZ4tISDvfoPjOx4BnA==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=uETz73-oS2rKXqHautkA:9 a=QEXdDO2ut3YA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-ORIG-GUID: 3tq_TePFXNZ7LaU3NoHQ5kA3vSkDTued X-Proofpoint-GUID: 3tq_TePFXNZ7LaU3NoHQ5kA3vSkDTued X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjExMDA2MSBTYWx0ZWRfX6Sk/QzZC+uD0 xUns5n1W43RvBJfqHjtWclkVy/tC5lEHP1nry58uGetTnTKd6Pawru6D5cn6I6S2kZIjWZHEU10 Ywskp8zxS979FFQCVEDAH7GyuxOaklwIFq5PqQ50biPpnBsbho/ciB4i8Le1jsWGPWjmLAOHMNU PY77Y9TrFpoW5n8CUjUd20M8TZyD9X2VQAelomMnED5KZDV+qcVa56Ic2SgWfmtQF5rgA2bEBwX y8HrqtVYb6UeS+nbTD1x+Scao5t2BonW6/7LXXqmvSvEdSsFRsS88e5TCnyiCAtD1xiNw/XLims inUWM71FuDcVaJpXITzv+BCSGxHI2tY2xYZVNhLZ9pW+KEPwa0zCqUychkwkFP4tznxt7+veC40 64dqa9tehslWqmk1m4yJyUlGXni+No4x86EODiquCv3nPtiv+lte74NXlfDQ40+wkM+f7Xh2sI5 J2poeYWCM/Xa9/lOQuw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjExMDA2MSBTYWx0ZWRfX0yt/QJ1yLMz6 84u67ZVJpHXFUbaDVJCbeCZCEbDMf6Qb03KNBLWvW19U9W9qR0CW7e+oH0uOLQGwf/bDQfODKch sIy8RCN7hUS9uWIL+LclgRrtmuZ7RW4= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-11_01,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 spamscore=0 suspectscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606110061 Hi Andi. On 23-05-2026 07:49, Bjorn Andersson wrote: > On Fri, Feb 27, 2026 at 11:45:31AM +0530, Praveen Talari wrote: >> The Qualcomm automotive SA8255p SoC relies on firmware to configure >> platform resources, including clocks, interconnects and TLMM. >> The driver requests resources operations over SCMI using power >> and performance protocols. >> >> The SCMI power protocol enables or disables resources like clocks, >> interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, >> such as resume/suspend, to control power states(on/off). >> >> The SCMI performance protocol manages I2C frequency, with each >> frequency rate represented by a performance level. The driver uses >> geni_se_set_perf_opp() API to request the desired frequency rate.. >> >> As part of geni_se_set_perf_opp(), the OPP for the requested frequency >> is obtained using dev_pm_opp_find_freq_floor() and the performance >> level is set using dev_pm_opp_set_opp(). >> > @Andi, I've merged the soc-patches through an immutable branch into the > qcom-tree for 7.2, please find this at: > > https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git 20260227061544.1785978-1-praveen.talari@oss.qualcomm.com > > Regards, > Bjorn @Andi I hope these I2C patches can be picked up now. Feedback is welcome if anything further is needed. Thanks, Praveen Talari > >> Praveen Talari (13): >> soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC >> path optional >> soc: qcom: geni-se: Add geni_icc_set_bw_ab() function >> soc: qcom: geni-se: Introduce helper API for resource initialization >> soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and >> geni_se_clks_on() >> soc: qcom: geni-se: Add resources activation/deactivation helpers >> soc: qcom: geni-se: Introduce helper API for attaching power domains >> soc: qcom: geni-se: Introduce helper APIs for performance control >> dt-bindings: i2c: Describe SA8255p >> i2c: qcom-geni: Isolate serial engine setup >> i2c: qcom-geni: Move resource initialization to separate function >> i2c: qcom-geni: Use resources helper APIs in runtime PM functions >> i2c: qcom-geni: Store of_device_id data in driver private struct >> i2c: qcom-geni: Enable I2C on SA8255p Qualcomm platforms >> --- >> v3->v4 >> - Added a new patch(4/13) to handle core clk as part of >> geni_se_clks_off/on(). >> >> .../bindings/i2c/qcom,sa8255p-geni-i2c.yaml | 64 ++++ >> drivers/i2c/busses/i2c-qcom-geni.c | 324 +++++++++--------- >> drivers/soc/qcom/qcom-geni-se.c | 270 ++++++++++++++- >> include/linux/soc/qcom/geni-se.h | 19 + >> 4 files changed, 491 insertions(+), 186 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml >> >> >> base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f >> -- >> 2.34.1 >>