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The driver/firmware should honor the peer who already holds > the mutex. > > Signed-off-by: Kartik Rajput > Signed-off-by: Akhil R > --- > v7 -> v8: > * Use `bool` instead of `int` for `locked` variable in > tegra_i2c_mutex_lock() function. > v6 -> v7: > * Return bool from tegra_i2c_mutex_acquired() and > tegra_i2c_mutex_trylock() functions. > * Move `has_mutex` check inside tegra_i2c_mutex_lock/unlock > functions. > * Remove redundant empty line added in tegra_i2c_xfer() in v6. > * Fix pm_runtime_put() not getting called if mutex unlock fails. > * In tegra_i2c_mutex_lock() simplify the logic to check if the > mutex is acquired or not by checking the value of `ret` > variable. > * Update commit message to describe the functioning of SW mutex > feature. > v4 -> v6: > * Guard tegra_i2c_mutex_lock() and tegra_i2c_mutex_unlock() to > ensure that they are called on platforms which support SW > mutex. > v3 -> v4: > * Update timeout logic of tegra_i2c_mutex_lock() to use > read_poll_timeout APIs for improving timeout logic. > * Add tegra_i2c_mutex_acquired() to check if mutex is acquired > or not. > * Rename I2C_SW_MUTEX_ID as I2C_SW_MUTEX_ID_CCPLEX. > * Function tegra_i2c_poll_register() was moved unnecessarily, it > has now been moved to its original location. > * Use tegra_i2c_mutex_lock/unlock APIs in the tegra_i2c_xfer() > function. This ensures proper propagation of error in case > mutex lock fails. > Please note that as the function tegra_i2c_xfer() is > already guarded by the bus lock operation there is no need of > additional lock for the tegra_i2c_mutex_lock/unlock APIs. > v2 -> v3: > * Update tegra_i2c_mutex_trylock and tegra_i2c_mutex_unlock to > use readl and writel APIs instead of i2c_readl and i2c_writel > which use relaxed APIs. > * Use dev_warn instead of WARN_ON if mutex lock/unlock fails. > v1 -> v2: > * Fixed typos. > * Fix tegra_i2c_mutex_lock() logic. > * Add a timeout in tegra_i2c_mutex_lock() instead of polling for > mutex indefinitely. > --- > drivers/i2c/busses/i2c-tegra.c | 92 ++++++++++++++++++++++++++++++++++ > 1 file changed, 92 insertions(+) > > diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c > index cc75340f6cb5..1c8c24ae54ed 100644 > --- a/drivers/i2c/busses/i2c-tegra.c > +++ b/drivers/i2c/busses/i2c-tegra.c > @@ -137,6 +137,14 @@ > > #define I2C_MASTER_RESET_CNTRL 0x0a8 > > +#define I2C_SW_MUTEX 0x0ec > +#define I2C_SW_MUTEX_REQUEST GENMASK(3, 0) > +#define I2C_SW_MUTEX_GRANT GENMASK(7, 4) > +#define I2C_SW_MUTEX_ID_CCPLEX 9 > + > +/* SW mutex acquire timeout value in microseconds. */ > +#define I2C_SW_MUTEX_TIMEOUT_US (25 * USEC_PER_MSEC) > + > /* configuration load timeout in microseconds */ > #define I2C_CONFIG_LOAD_TIMEOUT 1000000 > > @@ -210,6 +218,7 @@ enum msg_end_type { > * @has_interface_timing_reg: Has interface timing register to program the tuned > * timing settings. > * @has_hs_mode_support: Has support for high speed (HS) mode transfers. > + * @has_mutex: Has mutex register for mutual exclusion with other firmwares or VMs. > */ > struct tegra_i2c_hw_feature { > bool has_continue_xfer_support; > @@ -237,6 +246,7 @@ struct tegra_i2c_hw_feature { > u32 setup_hold_time_hs_mode; > bool has_interface_timing_reg; > bool has_hs_mode_support; > + bool has_mutex; > }; > > /** > @@ -381,6 +391,76 @@ static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, > readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); > } > > +static bool tegra_i2c_mutex_acquired(struct tegra_i2c_dev *i2c_dev) > +{ > + unsigned int reg = tegra_i2c_reg_addr(i2c_dev, I2C_SW_MUTEX); > + u32 val, id; > + > + val = readl(i2c_dev->base + reg); > + id = FIELD_GET(I2C_SW_MUTEX_GRANT, val); > + > + return id == I2C_SW_MUTEX_ID_CCPLEX; > +} > + > +static bool tegra_i2c_mutex_trylock(struct tegra_i2c_dev *i2c_dev) > +{ > + unsigned int reg = tegra_i2c_reg_addr(i2c_dev, I2C_SW_MUTEX); > + u32 val, id; > + > + val = readl(i2c_dev->base + reg); > + id = FIELD_GET(I2C_SW_MUTEX_GRANT, val); > + if (id != 0 && id != I2C_SW_MUTEX_ID_CCPLEX) > + return false; > + > + val = FIELD_PREP(I2C_SW_MUTEX_REQUEST, I2C_SW_MUTEX_ID_CCPLEX); > + writel(val, i2c_dev->base + reg); > + > + return tegra_i2c_mutex_acquired(i2c_dev); > +} > + > +static int tegra_i2c_mutex_lock(struct tegra_i2c_dev *i2c_dev) > +{ > + bool locked; > + int ret; > + > + if (!i2c_dev->hw->has_mutex) > + return 0; > + > + if (i2c_dev->atomic_mode) > + ret = read_poll_timeout_atomic(tegra_i2c_mutex_trylock, locked, locked, > + USEC_PER_MSEC, I2C_SW_MUTEX_TIMEOUT_US, > + false, i2c_dev); > + else > + ret = read_poll_timeout(tegra_i2c_mutex_trylock, locked, locked, USEC_PER_MSEC, > + I2C_SW_MUTEX_TIMEOUT_US, false, i2c_dev); > + > + if (ret) > + dev_warn(i2c_dev->dev, "failed to acquire mutex\n"); > + > + return ret; > +} > + > +static int tegra_i2c_mutex_unlock(struct tegra_i2c_dev *i2c_dev) > +{ > + unsigned int reg = tegra_i2c_reg_addr(i2c_dev, I2C_SW_MUTEX); > + u32 val, id; > + > + if (!i2c_dev->hw->has_mutex) > + return 0; > + > + val = readl(i2c_dev->base + reg); > + > + id = FIELD_GET(I2C_SW_MUTEX_GRANT, val); > + if (id && id != I2C_SW_MUTEX_ID_CCPLEX) { > + dev_warn(i2c_dev->dev, "unable to unlock mutex, mutex is owned by: %u\n", id); > + return -EPERM; > + } > + > + writel(0, i2c_dev->base + reg); > + > + return 0; > +} > + > static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) > { > u32 int_mask; > @@ -1432,6 +1512,10 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], > return ret; > } > > + ret = tegra_i2c_mutex_lock(i2c_dev); > + if (ret) > + return ret; > + > for (i = 0; i < num; i++) { > enum msg_end_type end_type = MSG_END_STOP; > > @@ -1461,6 +1545,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], > break; > } > > + ret = tegra_i2c_mutex_unlock(i2c_dev); > pm_runtime_put(i2c_dev->dev); > > return ret ?: i; > @@ -1537,6 +1622,7 @@ static const struct tegra_i2c_hw_feature tegra20_i2c_hw = { > .setup_hold_time_hs_mode = 0x0, > .has_interface_timing_reg = false, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra30_i2c_hw = { > @@ -1563,6 +1649,7 @@ static const struct tegra_i2c_hw_feature tegra30_i2c_hw = { > .setup_hold_time_hs_mode = 0x0, > .has_interface_timing_reg = false, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra114_i2c_hw = { > @@ -1589,6 +1676,7 @@ static const struct tegra_i2c_hw_feature tegra114_i2c_hw = { > .setup_hold_time_hs_mode = 0x0, > .has_interface_timing_reg = false, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra124_i2c_hw = { > @@ -1615,6 +1703,7 @@ static const struct tegra_i2c_hw_feature tegra124_i2c_hw = { > .setup_hold_time_hs_mode = 0x0, > .has_interface_timing_reg = true, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra210_i2c_hw = { > @@ -1641,6 +1730,7 @@ static const struct tegra_i2c_hw_feature tegra210_i2c_hw = { > .setup_hold_time_hs_mode = 0, > .has_interface_timing_reg = true, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra186_i2c_hw = { > @@ -1667,6 +1757,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = { > .setup_hold_time_hs_mode = 0, > .has_interface_timing_reg = true, > .has_hs_mode_support = false, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra194_i2c_hw = { > @@ -1695,6 +1786,7 @@ static const struct tegra_i2c_hw_feature tegra194_i2c_hw = { > .setup_hold_time_hs_mode = 0x090909, > .has_interface_timing_reg = true, > .has_hs_mode_support = true, > + .has_mutex = false, > }; > > static const struct tegra_i2c_hw_feature tegra256_i2c_hw = { Reviewed-by: Jon Hunter Thanks! Jon -- nvpublic