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Wed, 08 Jul 2026 02:41:07 -0700 (PDT) X-Received: by 2002:a17:903:41d1:b0:2ca:f425:4d44 with SMTP id d9443c01a7336-2ccea36913fmr17580715ad.4.1783503667149; Wed, 08 Jul 2026 02:41:07 -0700 (PDT) Received: from [10.217.219.87] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccdf808379sm12595115ad.48.2026.07.08.02.41.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jul 2026 02:41:06 -0700 (PDT) Message-ID: <76f79f3c-16ed-4935-bc0a-dcb26d2a009a@oss.qualcomm.com> Date: Wed, 8 Jul 2026 15:11:02 +0530 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] i2c: qcom-geni: Avoid unnecessary transfer cancel on address NACK To: Praveen Talari , Viken Dadhaniya , Andi Shyti Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Naresh Maramaina References: <20260708-fix_cancel_sequence_on_failure_for_i2c-v1-0-dd8f841f36a2@oss.qualcomm.com> <20260708-fix_cancel_sequence_on_failure_for_i2c-v1-3-dd8f841f36a2@oss.qualcomm.com> Content-Language: en-US From: Mukesh Savaliya In-Reply-To: <20260708-fix_cancel_sequence_on_failure_for_i2c-v1-3-dd8f841f36a2@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=KNNqylFo c=1 sm=1 tr=0 ts=6a4e1b34 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=KPAMhbskJAhAJ0Ap_bQA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA4MDA5MyBTYWx0ZWRfX75flzlswwTDG fEYsa61JV4I6TrEhmpsRgKzuNnxJfq/b1pNjohfP9rq7W/1CtUesKSvqh9aq4Z2G57RVF+aLjPB Ir9bQyXtUB2I9rh7U9RCqBaP9ok1aBY= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA4MDA5MyBTYWx0ZWRfXwcpx1ayhwU/o DC+X5sfXHIwtmK1pIIDg7VgZhyZhghMp5aL2EqirF2bY0uZW940ivX1bMO3QXO3fEbnNcMvnhij y40PxB+ptElOyjn3gFdxbeHGNgApSMOlkdcM3vWEWSmz5Jf/0XSCfObDx1PEPG4fQR76MN3LYuE vRWpGtURhkpAwNYXW/JJuVrQEkp3MVh5pyMQuaYpvr+plMc5IUApy8bTCZz+U2n2yzu9UTsoJfx tvGMlqWY/8HbEo/nOt7It+Bbw91Tr+Eus0pG6SFAIcYIc2D+QdXm43mES8g6Wpan6aEqj+7IZtk EFTmmFe+2VqB6Qv9SoaBxk/Ev9EZf3S0UDqzxbI00xaM0oFgWJzTr/bZRH1wfNLFlajxALL9qGR xHgWmub6ZZf2rycpgxvsi99BHjt6P1CZ6eJWYFvzkPdSxRU5gcakdLlUyR8ybo4WTTS73wEz7+3 /OgRqKgfpt6MumwVvKg== X-Proofpoint-ORIG-GUID: DanuSxswsl-gkamiR61lhfJlMBNXMZTs X-Proofpoint-GUID: DanuSxswsl-gkamiR61lhfJlMBNXMZTs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-08_01,2026-07-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 suspectscore=0 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607080093 On 7/8/2026 11:45 AM, Praveen Talari wrote: > When a target does not acknowledge its address phase, the GENI hardware > raises a NACK interrupt. In this case, SE_GENI_M_GP_LENGTH remains zero, > indicating that no data phase has started and the transfer was aborted at > the address stage. > > The driver currently treats all transfer errors similarly and always > issues geni_i2c_cancel_xfer() followed by TX/RX FSM resets for DMA > transfers. For address NACKs, the transfer has already terminated in > hardware and issuing an additional cancel/reset sequence is unnecessary. > > Track address NACKs separately by checking the transfer progress length > when a NACK interrupt is reported. Skip the transfer cancel operation and > DMA FSM reset paths when the NACK occurred during the address phase. > > This avoids redundant cancel/reset operations for a normal address NACK > condition while preserving the existing error recovery flow for all other > transfer failures. > When a target does not acknowledge its address phase The driver currently treats all transfer errors similarly Track address NACKs separately avoids redundant cancel/reset operations for a normal address NACK Looks repeated , in general you are handling address NACK and avoiding cancel/reset operation. Differentiate this NACK response against real errors. Try to simplify and shorten it. > Co-developed-by: Naresh Maramaina > Signed-off-by: Naresh Maramaina > Signed-off-by: Praveen Talari > --- > drivers/i2c/busses/i2c-qcom-geni.c | 16 +++++++++++----- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c > index 9490aee4928c..0448654f2678 100644 > --- a/drivers/i2c/busses/i2c-qcom-geni.c > +++ b/drivers/i2c/busses/i2c-qcom-geni.c > @@ -130,6 +130,7 @@ struct geni_i2c_dev { > struct dma_chan *rx_c; > bool no_dma; > bool gpi_mode; > + bool addr_nack; > bool is_tx_multi_desc_xfer; > u32 num_msgs; > struct geni_i2c_gpi_multi_desc_xfer i2c_multi_desc_config; > @@ -293,8 +294,12 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev) > if (!cur || > m_stat & (M_CMD_FAILURE_EN | M_CMD_ABORT_EN) || > dm_rx_st & (DM_I2C_CB_ERR)) { > - if (m_stat & M_GP_IRQ_1_EN) > + if (m_stat & M_GP_IRQ_1_EN) { > geni_i2c_err(gi2c, NACK); So we are handling NACK first and then deciding if its ADDR NACK ? You can pass ADDR or DATA nack to this function right ? and print the error log accordingly inside. > + val = readl_relaxed(base + SE_GENI_M_GP_LENGTH); > + if (!val) > + gi2c->addr_nack = true; > + } > if (m_stat & M_GP_IRQ_3_EN) > geni_i2c_err(gi2c, BUS_PROTO); > if (m_stat & M_GP_IRQ_4_EN) > @@ -443,7 +448,7 @@ static void geni_i2c_rx_msg_cleanup(struct geni_i2c_dev *gi2c, [...]