From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Bartosz Golaszewski <brgl@bgdev.pl>,
David Lechner <david@lechnology.com>
Cc: linux-i2c <linux-i2c@vger.kernel.org>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] eeprom: at24: Change nvmem stride to 1
Date: Wed, 6 Dec 2017 09:44:01 +0000 [thread overview]
Message-ID: <7ecd75fb-bd2c-53ae-a74a-2f13a6de5ec3@linaro.org> (raw)
In-Reply-To: <CAMRc=McoGNhQZwdNNwXwKYhjZvLPwUQbbVM4YjgnSnth7fOZTw@mail.gmail.com>
On 04/12/17 17:44, Bartosz Golaszewski wrote:
>> at24->nvmem_config.priv = at24;
>> - at24->nvmem_config.stride = 4;
>> + at24->nvmem_config.stride = 1;
>> at24->nvmem_config.word_size = 1;
>> at24->nvmem_config.size = chip.byte_len;
>>
>> --
>> 2.7.4
>>
> I can't find any documentation on what the stride config option does
> in nvmem, but looking at the code it's only used for alignment checks
> in nvmem core, so this patch should be ok. Still: I'm wondering if it
> shouldn't depend on the size of the eeprom or if we shouldn't make the
> chip you're using a special case.
>
> @David: what is the chip you're using? Is it an at24mac402 by any
> chance? Were you affected by the read problem we fixed recently[1][2]
> in at24?
>
> @Srinivas: any comments on that?
Stride is there to enforce address alignment. As long as there is no
issue on addresses aligned to 1 byte on at24 I do not see any issue with
the patch.
Thanks,
srini
next prev parent reply other threads:[~2017-12-06 9:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-04 1:54 [PATCH] eeprom: at24: Change nvmem stride to 1 David Lechner
2017-12-04 17:44 ` Bartosz Golaszewski
2017-12-04 21:22 ` David Lechner
2017-12-06 9:44 ` Srinivas Kandagatla [this message]
2017-12-06 10:25 ` Bartosz Golaszewski
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