From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Jean Delvare <jdelvare@suse.com>,
Andi Shyti <andi.shyti@kernel.org>,
linux-i2c@vger.kernel.org, Sanket.Goswami@amd.com,
Patil.Reddy@amd.com
Subject: Re: [PATCH v5 6/8] i2c: amd-asf: Add routine to handle the ASF slave process
Date: Tue, 17 Sep 2024 23:51:27 +0530 [thread overview]
Message-ID: <8378c4e5-0164-43a9-89f6-aa53d2ab4738@amd.com> (raw)
In-Reply-To: <ZuSP3ztZ9G5-Y7G0@smile.fi.intel.com>
On 9/14/2024 00:47, Andy Shevchenko wrote:
> On Fri, Sep 13, 2024 at 05:41:08PM +0530, Shyam Sundar S K wrote:
>> Add support for handling ASF slave process events as described in the AMD
>> ASF databook. This involves implementing the correct programming sequence
>> to manage each ASF packet appropriately.
>
> ...
>
>> /* ASF address offsets */
>> +#define ASFINDEX (7 + piix4_smba)
>
> 0x07
>
> ...
>
>> +#define ASF_ERROR_STATUS 0xE
>
> So, according to the usage this seems to be a mask, then perhaps GENMASK(3, 1) ?
>
GENMASK() works here.
> ...
>
>> +static void amd_asf_process_target(struct work_struct *work)
>> +{
>> + struct amd_asf_dev *dev = container_of(work, struct amd_asf_dev, work_buf.work);
>> + unsigned short piix4_smba = dev->port_addr->start;
>> + u8 data[ASF_BLOCK_MAX_BYTES];
>
>> + u8 len, idx, val = 0;
>
> Hmm... Does val = 0 assignment is due to false positive (or missing error check)?
>
I can remove the explicit assignment to zero.
>> + u8 bank, reg, cmd;
>> +
>> + /* Read target status register */
>> + reg = inb_p(ASFSLVSTA);
>> +
>> + /* Check if no error bits are set in target status register */
>> + if (reg & ASF_ERROR_STATUS) {
>> + /* Set bank as full */
>> + cmd = 0;
>> + reg = reg | GENMASK(3, 2);
>> + outb_p(reg, ASFDATABNKSEL);
>> + } else {
>> + /* Read data bank */
>> + reg = inb_p(ASFDATABNKSEL);
>> + bank = (reg & BIT(3)) ? 1 : 0;
>> +
>> + /* Set read data bank */
>> + if (bank) {
>> + reg = reg | BIT(4);
>> + reg = reg & ~BIT(3);
>> + } else {
>> + reg = reg & ~BIT(4);
>> + reg = reg & ~BIT(2);
>> + }
>> +
>> + /* Read command register */
>> + outb_p(reg, ASFDATABNKSEL);
>> + cmd = inb_p(ASFINDEX);
>> + len = inb_p(ASFDATARWPTR);
>> + for (idx = 0; idx < len; idx++)
>> + data[idx] = inb_p(ASFINDEX);
>> +
>> + /* Clear data bank status */
>> + if (bank) {
>> + reg = reg | BIT(3);
>> + outb_p(reg, ASFDATABNKSEL);
>> + } else {
>> + reg = reg | BIT(2);
>> + outb_p(reg, ASFDATABNKSEL);
>> + }
>> + }
>> +
>> + outb_p(0, ASFSETDATARDPTR);
>> + if (cmd & BIT(0))
>> + return;
>> +
>> + i2c_slave_event(dev->target, I2C_SLAVE_WRITE_REQUESTED, &val);
>
> Can this fail / return an error code? (I haven't checked)
i2c_slave_event() returns an error code, but here it is done with the
workqueue callback context. Hence I skipped the error checking part.
>
>> + for (idx = 0; idx < len; idx++) {
>> + val = data[idx];
>> + i2c_slave_event(dev->target, I2C_SLAVE_WRITE_RECEIVED, &val);
>> + }
>> + i2c_slave_event(dev->target, I2C_SLAVE_STOP, &val);
>> +}
>
> ...
>
>> + irq = platform_get_irq(pdev, 0);
>> + if (!irq)
>
> Incorrect check.
>
>> + return dev_err_probe(&pdev->dev, -EINVAL, "missing IRQ resources\n");
>
> Shadower real error code.
>
> ...
>
>> +static void amd_asf_remove(struct platform_device *pdev)
>> +{
>> + struct amd_asf_dev *dev = platform_get_drvdata(pdev);
>> +
>> + cancel_delayed_work_sync(&dev->work_buf);
>> +}
>
> Wouldn't devm-helpers.h APIs help with avoiding ->remove() creation?
>
next prev parent reply other threads:[~2024-09-17 18:21 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-13 12:11 [PATCH v5 0/8] Introduce initial AMD ASF Controller driver support Shyam Sundar S K
2024-09-13 12:11 ` [PATCH v5 1/8] i2c: piix4: Change the parameter list of piix4_transaction function Shyam Sundar S K
2024-09-13 19:21 ` Andy Shevchenko
2024-09-13 12:11 ` [PATCH v5 2/8] i2c: piix4: Move i2c_piix4 macros and structures to common header Shyam Sundar S K
2024-09-13 18:44 ` Andy Shevchenko
2024-09-13 12:11 ` [PATCH v5 3/8] i2c: piix4: Export i2c_piix4 driver functions as library Shyam Sundar S K
2024-09-13 18:54 ` Andy Shevchenko
2024-09-17 18:14 ` Shyam Sundar S K
2024-09-18 9:56 ` Andy Shevchenko
2024-09-18 10:14 ` Shyam Sundar S K
2024-09-18 20:50 ` Andi Shyti
2024-09-13 12:11 ` [PATCH v5 4/8] i2c: amd-asf: Add ACPI support for AMD ASF Controller Shyam Sundar S K
2024-09-13 19:18 ` Andy Shevchenko
2024-09-13 22:45 ` kernel test robot
2024-09-19 19:44 ` kernel test robot
2024-09-13 12:11 ` [PATCH v5 5/8] i2c: amd-asf: Add i2c_algorithm operations to support AMD ASF with SMBus Shyam Sundar S K
2024-09-13 19:08 ` Andy Shevchenko
2024-09-17 18:17 ` Shyam Sundar S K
2024-09-18 9:58 ` Andy Shevchenko
2024-09-18 10:24 ` Shyam Sundar S K
2024-09-13 12:11 ` [PATCH v5 6/8] i2c: amd-asf: Add routine to handle the ASF slave process Shyam Sundar S K
2024-09-13 19:17 ` Andy Shevchenko
2024-09-17 18:21 ` Shyam Sundar S K [this message]
2024-09-18 10:00 ` Andy Shevchenko
2024-09-13 12:11 ` [PATCH v5 7/8] i2c: amd-asf: Clear remote IRR bit to get successive interrupt Shyam Sundar S K
2024-09-13 19:19 ` Andy Shevchenko
2024-09-17 18:31 ` Shyam Sundar S K
2024-09-18 10:03 ` Andy Shevchenko
2024-09-18 10:28 ` Shyam Sundar S K
2024-09-18 14:05 ` Andy Shevchenko
2024-09-13 12:11 ` [PATCH v5 8/8] MAINTAINERS: Add AMD ASF driver entry Shyam Sundar S K
2024-09-13 19:20 ` [PATCH v5 0/8] Introduce initial AMD ASF Controller driver support Andy Shevchenko
2024-09-17 18:11 ` Shyam Sundar S K
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