[PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Cory Maccarrone]

The current i2c-omap driver is set up for 32-bit registers, which
corresponds to most OMAP devices.  However, OMAP730/850 based
devices use a 16-bit register size.

This change modifies the driver to perform a runtime CPU type check
to determine the register sizes, and uses a bit shift of either 1
or 2 bits to compute the proper register sizes for all registers.

Signed-off-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 drivers/i2c/busses/i2c-omap.c |   44 +++++++++++++++++++++++-----------------
 1 files changed, 25 insertions(+), 19 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 827da08..4f8e2f5 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -49,24 +49,24 @@
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
 #define OMAP_I2C_REV_REG		0x00
-#define OMAP_I2C_IE_REG			0x04
-#define OMAP_I2C_STAT_REG		0x08
-#define OMAP_I2C_IV_REG			0x0c
+#define OMAP_I2C_IE_REG			0x01
+#define OMAP_I2C_STAT_REG		0x02
+#define OMAP_I2C_IV_REG			0x03
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG			0x0c
-#define OMAP_I2C_SYSS_REG		0x10
-#define OMAP_I2C_BUF_REG		0x14
-#define OMAP_I2C_CNT_REG		0x18
-#define OMAP_I2C_DATA_REG		0x1c
-#define OMAP_I2C_SYSC_REG		0x20
-#define OMAP_I2C_CON_REG		0x24
-#define OMAP_I2C_OA_REG			0x28
-#define OMAP_I2C_SA_REG			0x2c
-#define OMAP_I2C_PSC_REG		0x30
-#define OMAP_I2C_SCLL_REG		0x34
-#define OMAP_I2C_SCLH_REG		0x38
-#define OMAP_I2C_SYSTEST_REG		0x3c
-#define OMAP_I2C_BUFSTAT_REG		0x40
+#define OMAP_I2C_WE_REG			0x03
+#define OMAP_I2C_SYSS_REG		0x04
+#define OMAP_I2C_BUF_REG		0x05
+#define OMAP_I2C_CNT_REG		0x06
+#define OMAP_I2C_DATA_REG		0x07
+#define OMAP_I2C_SYSC_REG		0x08
+#define OMAP_I2C_CON_REG		0x09
+#define OMAP_I2C_OA_REG			0x0a
+#define OMAP_I2C_SA_REG			0x0b
+#define OMAP_I2C_PSC_REG		0x0c
+#define OMAP_I2C_SCLL_REG		0x0d
+#define OMAP_I2C_SCLH_REG		0x0e
+#define OMAP_I2C_SYSTEST_REG		0x0f
+#define OMAP_I2C_BUFSTAT_REG		0x10
 
 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
@@ -161,6 +161,7 @@ struct omap_i2c_dev {
 	struct device		*dev;
 	void __iomem		*base;		/* virtual */
 	int			irq;
+	int			reg_shift;      /* bit shift for I2C register addresses */
 	struct clk		*iclk;		/* Interface clock */
 	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
@@ -183,12 +184,12 @@ struct omap_i2c_dev {
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
 				      int reg, u16 val)
 {
-	__raw_writew(val, i2c_dev->base + reg);
+	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-	return __raw_readw(i2c_dev->base + reg);
+	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -895,6 +896,11 @@ omap_i2c_probe(struct platform_device *pdev)
 		dev->b_hw = 1; /* Enable hardware fixes */
 	}
 
+	if (cpu_is_omap7xx())
+		dev->reg_shift = 1;
+	else
+		dev->reg_shift = 2;
+
 	/* reset ASAP, clearing any IRQs */
 	omap_i2c_init(dev);
 
-- 
1.6.3.3

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Cory Maccarrone]

On Sat, Dec 12, 2009 at 5:54 PM, Cory Maccarrone <darkstar6262-Re5JQEeQqe8@public.gmane.orgm> wrote:
> The current i2c-omap driver is set up for 32-bit registers, which
> corresponds to most OMAP devices.  However, OMAP730/850 based
> devices use a 16-bit register size.
>
> This change modifies the driver to perform a runtime CPU type check
> to determine the register sizes, and uses a bit shift of either 1
> or 2 bits to compute the proper register sizes for all registers.
>
> Signed-off-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Haven't heard anything recently on this one -- any chance of it
getting in for the next -rc merge window, or is this a change that'll
need to go in for the next release?  Without it, I2C doesn't work on
omap7xx devices.

Thanks
- Cory

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Tony Lindgren]

* Cory Maccarrone <darkstar6262@gmail.com> [100109 09:45]:
> On Sat, Dec 12, 2009 at 5:54 PM, Cory Maccarrone <darkstar6262@gmail.com> wrote:
> > The current i2c-omap driver is set up for 32-bit registers, which
> > corresponds to most OMAP devices.  However, OMAP730/850 based
> > devices use a 16-bit register size.
> >
> > This change modifies the driver to perform a runtime CPU type check
> > to determine the register sizes, and uses a bit shift of either 1
> > or 2 bits to compute the proper register sizes for all registers.
> >
> > Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
> 
> Haven't heard anything recently on this one -- any chance of it
> getting in for the next -rc merge window, or is this a change that'll
> need to go in for the next release?  Without it, I2C doesn't work on
> omap7xx devices.

Let's plan on adding this into omap-testing branch next week so
we can make sure things are OK for the other platforms.

Then assuming no issues, let's ask Ben can queue it.

Regards,

Tony
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Cory Maccarrone]

On Sat, Jan 9, 2010 at 10:33 AM, Tony Lindgren <tony@atomide.com> wrote:
>
> Let's plan on adding this into omap-testing branch next week so
> we can make sure things are OK for the other platforms.
>
> Then assuming no issues, let's ask Ben can queue it.
>

Excellent, thank you!

- Cory

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Tony Lindgren]

[-- Attachment #1: Type: text/plain, Size: 531 bytes --]

* Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [100109 10:34]:
> On Sat, Jan 9, 2010 at 10:33 AM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
> >
> > Let's plan on adding this into omap-testing branch next week so
> > we can make sure things are OK for the other platforms.
> >
> > Then assuming no issues, let's ask Ben can queue it.
> >
> 
> Excellent, thank you!

Applied to omap-testing with the following fix. Can you please merge
it into your original patch?

Regards,

Tony

[-- Attachment #2: i2c-omap-fix-reg-shift --]
[-- Type: text/plain, Size: 1114 bytes --]

>From 5b640a850de9fb87b9e9e6dd2cfeb7144ada8053 Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Date: Mon, 11 Jan 2010 17:22:21 -0800
Subject: [PATCH] i2c-omap: Fix reg_shift init

Otherwise register access won't work during probe
for omap_i2c_unidle.

Signed-off-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 913abd7..9c3ce4d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -894,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
 	dev->idle = 1;
 	dev->dev = &pdev->dev;
 	dev->irq = irq->start;
+
+	if (cpu_is_omap7xx())
+		dev->reg_shift = 1;
+	else
+		dev->reg_shift = 2;
+
 	dev->base = ioremap(mem->start, resource_size(mem));
 	if (!dev->base) {
 		r = -ENOMEM;
@@ -925,11 +931,6 @@ omap_i2c_probe(struct platform_device *pdev)
 		dev->b_hw = 1; /* Enable hardware fixes */
 	}
 
-	if (cpu_is_omap7xx())
-		dev->reg_shift = 1;
-	else
-		dev->reg_shift = 2;
-
 	/* reset ASAP, clearing any IRQs */
 	omap_i2c_init(dev);
 

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Cory Maccarrone]

[-- Attachment #1: Type: text/plain, Size: 3856 bytes --]

On Mon, Jan 11, 2010 at 5:28 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
>
> Applied to omap-testing with the following fix. Can you please merge
> it into your original patch?
>

Done, I've attached the new patch to here.  I've tested it and it
works perfectly.

- Cory


>From 7c693afce8ffa3978b4fcecc56cd7d4a9d9d3b75 Mon Sep 17 00:00:00 2001
From: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Date: Sat, 5 Dec 2009 22:00:25 -0800
Subject: [PATCH] [I2C-OMAP] Add support for 16-bit registers

The current i2c-omap driver is set up for 32-bit registers, which
corresponds to most OMAP devices.  However, OMAP730/850 based
devices use a 16-bit register size.

This change modifies the driver to perform a runtime CPU type check
to determine the register sizes, and uses a bit shift of either 1
or 2 bits to compute the proper register sizes for all registers.

Signed-off-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 drivers/i2c/busses/i2c-omap.c |   45 +++++++++++++++++++++++-----------------
 1 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 0037e31..9c3ce4d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -49,24 +49,24 @@
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))

 #define OMAP_I2C_REV_REG		0x00
-#define OMAP_I2C_IE_REG			0x04
-#define OMAP_I2C_STAT_REG		0x08
-#define OMAP_I2C_IV_REG			0x0c
+#define OMAP_I2C_IE_REG			0x01
+#define OMAP_I2C_STAT_REG		0x02
+#define OMAP_I2C_IV_REG			0x03
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG			0x0c
-#define OMAP_I2C_SYSS_REG		0x10
-#define OMAP_I2C_BUF_REG		0x14
-#define OMAP_I2C_CNT_REG		0x18
-#define OMAP_I2C_DATA_REG		0x1c
-#define OMAP_I2C_SYSC_REG		0x20
-#define OMAP_I2C_CON_REG		0x24
-#define OMAP_I2C_OA_REG			0x28
-#define OMAP_I2C_SA_REG			0x2c
-#define OMAP_I2C_PSC_REG		0x30
-#define OMAP_I2C_SCLL_REG		0x34
-#define OMAP_I2C_SCLH_REG		0x38
-#define OMAP_I2C_SYSTEST_REG		0x3c
-#define OMAP_I2C_BUFSTAT_REG		0x40
+#define OMAP_I2C_WE_REG			0x03
+#define OMAP_I2C_SYSS_REG		0x04
+#define OMAP_I2C_BUF_REG		0x05
+#define OMAP_I2C_CNT_REG		0x06
+#define OMAP_I2C_DATA_REG		0x07
+#define OMAP_I2C_SYSC_REG		0x08
+#define OMAP_I2C_CON_REG		0x09
+#define OMAP_I2C_OA_REG			0x0a
+#define OMAP_I2C_SA_REG			0x0b
+#define OMAP_I2C_PSC_REG		0x0c
+#define OMAP_I2C_SCLL_REG		0x0d
+#define OMAP_I2C_SCLH_REG		0x0e
+#define OMAP_I2C_SYSTEST_REG		0x0f
+#define OMAP_I2C_BUFSTAT_REG		0x10

 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
@@ -161,6 +161,7 @@ struct omap_i2c_dev {
 	struct device		*dev;
 	void __iomem		*base;		/* virtual */
 	int			irq;
+	int			reg_shift;      /* bit shift for I2C register addresses */
 	struct clk		*iclk;		/* Interface clock */
 	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
@@ -189,12 +190,12 @@ struct omap_i2c_dev {
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
 				      int reg, u16 val)
 {
-	__raw_writew(val, i2c_dev->base + reg);
+	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
 }

 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-	return __raw_readw(i2c_dev->base + reg);
+	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
 }

 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -893,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
 	dev->idle = 1;
 	dev->dev = &pdev->dev;
 	dev->irq = irq->start;
+
+	if (cpu_is_omap7xx())
+		dev->reg_shift = 1;
+	else
+		dev->reg_shift = 2;
+
 	dev->base = ioremap(mem->start, resource_size(mem));
 	if (!dev->base) {
 		r = -ENOMEM;
-- 
1.6.3.3

[-- Attachment #2: 0001-I2C-OMAP-Add-support-for-16-bit-registers.patch --]
[-- Type: text/x-diff, Size: 3499 bytes --]

From 7c693afce8ffa3978b4fcecc56cd7d4a9d9d3b75 Mon Sep 17 00:00:00 2001
From: Cory Maccarrone <darkstar6262@gmail.com>
Date: Sat, 5 Dec 2009 22:00:25 -0800
Subject: [PATCH] [I2C-OMAP] Add support for 16-bit registers

The current i2c-omap driver is set up for 32-bit registers, which
corresponds to most OMAP devices.  However, OMAP730/850 based
devices use a 16-bit register size.

This change modifies the driver to perform a runtime CPU type check
to determine the register sizes, and uses a bit shift of either 1
or 2 bits to compute the proper register sizes for all registers.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
---
 drivers/i2c/busses/i2c-omap.c |   45 +++++++++++++++++++++++-----------------
 1 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 0037e31..9c3ce4d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -49,24 +49,24 @@
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
 #define OMAP_I2C_REV_REG		0x00
-#define OMAP_I2C_IE_REG			0x04
-#define OMAP_I2C_STAT_REG		0x08
-#define OMAP_I2C_IV_REG			0x0c
+#define OMAP_I2C_IE_REG			0x01
+#define OMAP_I2C_STAT_REG		0x02
+#define OMAP_I2C_IV_REG			0x03
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG			0x0c
-#define OMAP_I2C_SYSS_REG		0x10
-#define OMAP_I2C_BUF_REG		0x14
-#define OMAP_I2C_CNT_REG		0x18
-#define OMAP_I2C_DATA_REG		0x1c
-#define OMAP_I2C_SYSC_REG		0x20
-#define OMAP_I2C_CON_REG		0x24
-#define OMAP_I2C_OA_REG			0x28
-#define OMAP_I2C_SA_REG			0x2c
-#define OMAP_I2C_PSC_REG		0x30
-#define OMAP_I2C_SCLL_REG		0x34
-#define OMAP_I2C_SCLH_REG		0x38
-#define OMAP_I2C_SYSTEST_REG		0x3c
-#define OMAP_I2C_BUFSTAT_REG		0x40
+#define OMAP_I2C_WE_REG			0x03
+#define OMAP_I2C_SYSS_REG		0x04
+#define OMAP_I2C_BUF_REG		0x05
+#define OMAP_I2C_CNT_REG		0x06
+#define OMAP_I2C_DATA_REG		0x07
+#define OMAP_I2C_SYSC_REG		0x08
+#define OMAP_I2C_CON_REG		0x09
+#define OMAP_I2C_OA_REG			0x0a
+#define OMAP_I2C_SA_REG			0x0b
+#define OMAP_I2C_PSC_REG		0x0c
+#define OMAP_I2C_SCLL_REG		0x0d
+#define OMAP_I2C_SCLH_REG		0x0e
+#define OMAP_I2C_SYSTEST_REG		0x0f
+#define OMAP_I2C_BUFSTAT_REG		0x10
 
 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
@@ -161,6 +161,7 @@ struct omap_i2c_dev {
 	struct device		*dev;
 	void __iomem		*base;		/* virtual */
 	int			irq;
+	int			reg_shift;      /* bit shift for I2C register addresses */
 	struct clk		*iclk;		/* Interface clock */
 	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
@@ -189,12 +190,12 @@ struct omap_i2c_dev {
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
 				      int reg, u16 val)
 {
-	__raw_writew(val, i2c_dev->base + reg);
+	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-	return __raw_readw(i2c_dev->base + reg);
+	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
 }
 
 static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -893,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
 	dev->idle = 1;
 	dev->dev = &pdev->dev;
 	dev->irq = irq->start;
+
+	if (cpu_is_omap7xx())
+		dev->reg_shift = 1;
+	else
+		dev->reg_shift = 2;
+
 	dev->base = ioremap(mem->start, resource_size(mem));
 	if (!dev->base) {
 		r = -ENOMEM;
-- 
1.6.3.3

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Tony Lindgren]

* Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [100111 17:49]:
> On Mon, Jan 11, 2010 at 5:28 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
> >
> > Applied to omap-testing with the following fix. Can you please merge
> > it into your original patch?
> >
> 
> Done, I've attached the new patch to here.  I've tested it and it
> works perfectly.

Here's my ack for this patch:

Acked-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>

> 
> - Cory
> 
> 
> From 7c693afce8ffa3978b4fcecc56cd7d4a9d9d3b75 Mon Sep 17 00:00:00 2001
> From: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Date: Sat, 5 Dec 2009 22:00:25 -0800
> Subject: [PATCH] [I2C-OMAP] Add support for 16-bit registers
> 
> The current i2c-omap driver is set up for 32-bit registers, which
> corresponds to most OMAP devices.  However, OMAP730/850 based
> devices use a 16-bit register size.
> 
> This change modifies the driver to perform a runtime CPU type check
> to determine the register sizes, and uses a bit shift of either 1
> or 2 bits to compute the proper register sizes for all registers.
> 
> Signed-off-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
>  drivers/i2c/busses/i2c-omap.c |   45 +++++++++++++++++++++++-----------------
>  1 files changed, 26 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 0037e31..9c3ce4d 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -49,24 +49,24 @@
>  #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
> 
>  #define OMAP_I2C_REV_REG		0x00
> -#define OMAP_I2C_IE_REG			0x04
> -#define OMAP_I2C_STAT_REG		0x08
> -#define OMAP_I2C_IV_REG			0x0c
> +#define OMAP_I2C_IE_REG			0x01
> +#define OMAP_I2C_STAT_REG		0x02
> +#define OMAP_I2C_IV_REG			0x03
>  /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> -#define OMAP_I2C_WE_REG			0x0c
> -#define OMAP_I2C_SYSS_REG		0x10
> -#define OMAP_I2C_BUF_REG		0x14
> -#define OMAP_I2C_CNT_REG		0x18
> -#define OMAP_I2C_DATA_REG		0x1c
> -#define OMAP_I2C_SYSC_REG		0x20
> -#define OMAP_I2C_CON_REG		0x24
> -#define OMAP_I2C_OA_REG			0x28
> -#define OMAP_I2C_SA_REG			0x2c
> -#define OMAP_I2C_PSC_REG		0x30
> -#define OMAP_I2C_SCLL_REG		0x34
> -#define OMAP_I2C_SCLH_REG		0x38
> -#define OMAP_I2C_SYSTEST_REG		0x3c
> -#define OMAP_I2C_BUFSTAT_REG		0x40
> +#define OMAP_I2C_WE_REG			0x03
> +#define OMAP_I2C_SYSS_REG		0x04
> +#define OMAP_I2C_BUF_REG		0x05
> +#define OMAP_I2C_CNT_REG		0x06
> +#define OMAP_I2C_DATA_REG		0x07
> +#define OMAP_I2C_SYSC_REG		0x08
> +#define OMAP_I2C_CON_REG		0x09
> +#define OMAP_I2C_OA_REG			0x0a
> +#define OMAP_I2C_SA_REG			0x0b
> +#define OMAP_I2C_PSC_REG		0x0c
> +#define OMAP_I2C_SCLL_REG		0x0d
> +#define OMAP_I2C_SCLH_REG		0x0e
> +#define OMAP_I2C_SYSTEST_REG		0x0f
> +#define OMAP_I2C_BUFSTAT_REG		0x10
> 
>  /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
>  #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
> @@ -161,6 +161,7 @@ struct omap_i2c_dev {
>  	struct device		*dev;
>  	void __iomem		*base;		/* virtual */
>  	int			irq;
> +	int			reg_shift;      /* bit shift for I2C register addresses */
>  	struct clk		*iclk;		/* Interface clock */
>  	struct clk		*fclk;		/* Functional clock */
>  	struct completion	cmd_complete;
> @@ -189,12 +190,12 @@ struct omap_i2c_dev {
>  static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
>  				      int reg, u16 val)
>  {
> -	__raw_writew(val, i2c_dev->base + reg);
> +	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
>  }
> 
>  static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
>  {
> -	return __raw_readw(i2c_dev->base + reg);
> +	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
>  }
> 
>  static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> @@ -893,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
>  	dev->idle = 1;
>  	dev->dev = &pdev->dev;
>  	dev->irq = irq->start;
> +
> +	if (cpu_is_omap7xx())
> +		dev->reg_shift = 1;
> +	else
> +		dev->reg_shift = 2;
> +
>  	dev->base = ioremap(mem->start, resource_size(mem));
>  	if (!dev->base) {
>  		r = -ENOMEM;
> -- 
> 1.6.3.3

> From 7c693afce8ffa3978b4fcecc56cd7d4a9d9d3b75 Mon Sep 17 00:00:00 2001
> From: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Date: Sat, 5 Dec 2009 22:00:25 -0800
> Subject: [PATCH] [I2C-OMAP] Add support for 16-bit registers
> 
> The current i2c-omap driver is set up for 32-bit registers, which
> corresponds to most OMAP devices.  However, OMAP730/850 based
> devices use a 16-bit register size.
> 
> This change modifies the driver to perform a runtime CPU type check
> to determine the register sizes, and uses a bit shift of either 1
> or 2 bits to compute the proper register sizes for all registers.
> 
> Signed-off-by: Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
>  drivers/i2c/busses/i2c-omap.c |   45 +++++++++++++++++++++++-----------------
>  1 files changed, 26 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 0037e31..9c3ce4d 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -49,24 +49,24 @@
>  #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
>  
>  #define OMAP_I2C_REV_REG		0x00
> -#define OMAP_I2C_IE_REG			0x04
> -#define OMAP_I2C_STAT_REG		0x08
> -#define OMAP_I2C_IV_REG			0x0c
> +#define OMAP_I2C_IE_REG			0x01
> +#define OMAP_I2C_STAT_REG		0x02
> +#define OMAP_I2C_IV_REG			0x03
>  /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
> -#define OMAP_I2C_WE_REG			0x0c
> -#define OMAP_I2C_SYSS_REG		0x10
> -#define OMAP_I2C_BUF_REG		0x14
> -#define OMAP_I2C_CNT_REG		0x18
> -#define OMAP_I2C_DATA_REG		0x1c
> -#define OMAP_I2C_SYSC_REG		0x20
> -#define OMAP_I2C_CON_REG		0x24
> -#define OMAP_I2C_OA_REG			0x28
> -#define OMAP_I2C_SA_REG			0x2c
> -#define OMAP_I2C_PSC_REG		0x30
> -#define OMAP_I2C_SCLL_REG		0x34
> -#define OMAP_I2C_SCLH_REG		0x38
> -#define OMAP_I2C_SYSTEST_REG		0x3c
> -#define OMAP_I2C_BUFSTAT_REG		0x40
> +#define OMAP_I2C_WE_REG			0x03
> +#define OMAP_I2C_SYSS_REG		0x04
> +#define OMAP_I2C_BUF_REG		0x05
> +#define OMAP_I2C_CNT_REG		0x06
> +#define OMAP_I2C_DATA_REG		0x07
> +#define OMAP_I2C_SYSC_REG		0x08
> +#define OMAP_I2C_CON_REG		0x09
> +#define OMAP_I2C_OA_REG			0x0a
> +#define OMAP_I2C_SA_REG			0x0b
> +#define OMAP_I2C_PSC_REG		0x0c
> +#define OMAP_I2C_SCLL_REG		0x0d
> +#define OMAP_I2C_SCLH_REG		0x0e
> +#define OMAP_I2C_SYSTEST_REG		0x0f
> +#define OMAP_I2C_BUFSTAT_REG		0x10
>  
>  /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
>  #define OMAP_I2C_IE_XDR		(1 << 14)	/* TX Buffer drain int enable */
> @@ -161,6 +161,7 @@ struct omap_i2c_dev {
>  	struct device		*dev;
>  	void __iomem		*base;		/* virtual */
>  	int			irq;
> +	int			reg_shift;      /* bit shift for I2C register addresses */
>  	struct clk		*iclk;		/* Interface clock */
>  	struct clk		*fclk;		/* Functional clock */
>  	struct completion	cmd_complete;
> @@ -189,12 +190,12 @@ struct omap_i2c_dev {
>  static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
>  				      int reg, u16 val)
>  {
> -	__raw_writew(val, i2c_dev->base + reg);
> +	__raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
>  }
>  
>  static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
>  {
> -	return __raw_readw(i2c_dev->base + reg);
> +	return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
>  }
>  
>  static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> @@ -893,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
>  	dev->idle = 1;
>  	dev->dev = &pdev->dev;
>  	dev->irq = irq->start;
> +
> +	if (cpu_is_omap7xx())
> +		dev->reg_shift = 1;
> +	else
> +		dev->reg_shift = 2;
> +
>  	dev->base = ioremap(mem->start, resource_size(mem));
>  	if (!dev->base) {
>  		r = -ENOMEM;
> -- 
> 1.6.3.3
> 

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Kevin Hilman]

Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:

> * Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [100109 10:34]:
>> On Sat, Jan 9, 2010 at 10:33 AM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
>> >
>> > Let's plan on adding this into omap-testing branch next week so
>> > we can make sure things are OK for the other platforms.
>> >
>> > Then assuming no issues, let's ask Ben can queue it.
>> >
>> 
>> Excellent, thank you!
>
> Applied to omap-testing with the following fix. Can you please merge
> it into your original patch?

Unfortunately, Tony's additional fix did not make it into the version
that was merged to mainline, which results in a crash during
probe when using v2.6.34-rc1.

Ben, can you queue the fix below from Tony for -rc2?

Kevin


>
> Tony
> From 5b640a850de9fb87b9e9e6dd2cfeb7144ada8053 Mon Sep 17 00:00:00 2001
> From: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> Date: Mon, 11 Jan 2010 17:22:21 -0800
> Subject: [PATCH] i2c-omap: Fix reg_shift init
>
> Otherwise register access won't work during probe
> for omap_i2c_unidle.
>
> Signed-off-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 913abd7..9c3ce4d 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -894,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
>  	dev->idle = 1;
>  	dev->dev = &pdev->dev;
>  	dev->irq = irq->start;
> +
> +	if (cpu_is_omap7xx())
> +		dev->reg_shift = 1;
> +	else
> +		dev->reg_shift = 2;
> +
>  	dev->base = ioremap(mem->start, resource_size(mem));
>  	if (!dev->base) {
>  		r = -ENOMEM;
> @@ -925,11 +931,6 @@ omap_i2c_probe(struct platform_device *pdev)
>  		dev->b_hw = 1; /* Enable hardware fixes */
>  	}
>  
> -	if (cpu_is_omap7xx())
> -		dev->reg_shift = 1;
> -	else
> -		dev->reg_shift = 2;
> -
>  	/* reset ASAP, clearing any IRQs */
>  	omap_i2c_init(dev);
>  

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Tony Lindgren]

[-- Attachment #1: Type: text/plain, Size: 1422 bytes --]

* Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org> [100310 10:01]:
> Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:
> 
> > * Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [100109 10:34]:
> >> On Sat, Jan 9, 2010 at 10:33 AM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
> >> >
> >> > Let's plan on adding this into omap-testing branch next week so
> >> > we can make sure things are OK for the other platforms.
> >> >
> >> > Then assuming no issues, let's ask Ben can queue it.
> >> >
> >> 
> >> Excellent, thank you!
> >
> > Applied to omap-testing with the following fix. Can you please merge
> > it into your original patch?
> 
> Unfortunately, Tony's additional fix did not make it into the version
> that was merged to mainline, which results in a crash during
> probe when using v2.6.34-rc1.
> 
> Ben, can you queue the fix below from Tony for -rc2?

The original patch attached again below.

Oops, did I maybe send a wrong patchwork link earlier to the
patch?

Anyways, for the future, considering how critical this driver is
for all omaps.. And considering how badly this driver needs some
updates done..

How about we pile up the i2c-omap patches for testing into linux-omap
branch first, then ask Ben to pull it around -rc6 after we've all
acked and tested the changes?

Ben does that sound OK to you?

Regards,

Tony

[-- Attachment #2: i2c-init-fix.patch --]
[-- Type: text/x-diff, Size: 1113 bytes --]

>From 07e3b9fc5a37c3d1228ecc6fb2726211bb8d41df Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Date: Tue, 9 Mar 2010 16:53:18 -0800
Subject: [PATCH] i2c-omap: Fix reg_shift init

Otherwise register access won't work during probe
for omap_i2c_unidle.

Signed-off-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index c7c2375..3d7cf1f 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -894,6 +894,12 @@ omap_i2c_probe(struct platform_device *pdev)
 	dev->idle = 1;
 	dev->dev = &pdev->dev;
 	dev->irq = irq->start;
+
+	if (cpu_is_omap7xx())
+		dev->reg_shift = 1;
+	else
+		dev->reg_shift = 2;
+
 	dev->base = ioremap(mem->start, resource_size(mem));
 	if (!dev->base) {
 		r = -ENOMEM;
@@ -925,11 +931,6 @@ omap_i2c_probe(struct platform_device *pdev)
 		dev->b_hw = 1; /* Enable hardware fixes */
 	}
 
-	if (cpu_is_omap7xx())
-		dev->reg_shift = 1;
-	else
-		dev->reg_shift = 2;
-
 	/* reset ASAP, clearing any IRQs */
 	omap_i2c_init(dev);
 

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Kevin Hilman]

Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:

> * Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org> [100310 10:01]:
>> Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:
>> 
>> > * Cory Maccarrone <darkstar6262-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [100109 10:34]:
>> >> On Sat, Jan 9, 2010 at 10:33 AM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
>> >> >
>> >> > Let's plan on adding this into omap-testing branch next week so
>> >> > we can make sure things are OK for the other platforms.
>> >> >
>> >> > Then assuming no issues, let's ask Ben can queue it.
>> >> >
>> >> 
>> >> Excellent, thank you!
>> >
>> > Applied to omap-testing with the following fix. Can you please merge
>> > it into your original patch?
>> 
>> Unfortunately, Tony's additional fix did not make it into the version
>> that was merged to mainline, which results in a crash during
>> probe when using v2.6.34-rc1.
>> 
>> Ben, can you queue the fix below from Tony for -rc2?
>
> The original patch attached again below.
>
> Oops, did I maybe send a wrong patchwork link earlier to the
> patch?
>
> Anyways, for the future, considering how critical this driver is
> for all omaps.. And considering how badly this driver needs some
> updates done..
>
> How about we pile up the i2c-omap patches for testing into linux-omap
> branch first, then ask Ben to pull it around -rc6 after we've all
> acked and tested the changes?
>
> Ben does that sound OK to you?

Here's another one to add to omap-testing then.

This one has been submitted to linux-i2c a couple times and been in
the OMAP PM branch for a while.

Kevin

>From 639d6ce328663c0e6cb1623bc69bcb5d167db2f9 Mon Sep 17 00:00:00 2001
From: Kalle Jokiniemi <kalle.jokiniemi-sMOQStClEysAvxtiuMwx3w@public.gmane.org>
Date: Wed, 21 Oct 2009 14:51:21 +0300
Subject: [PATCH] i2c-omap: add mpu wake up latency constraint in i2c

While waiting for completion of the i2c transfer, the
MPU could hit OFF mode and cause several msecs of
delay that made i2c transfers fail more often. The
extra delays and subsequent re-trys cause i2c clocks
to be active more often. This has also an negative
effect on power consumption.

Created a mechanism for passing and using the
constraint setting function in driver code. The used
mpu wake up latency constraints are now set individually
per bus, and they are calculated based on clock rate
and fifo size.

Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley,
and Nishanth Menon for tuning out the details of
this patch.

Cc: Moiz Sonasath <m-sonasath-l0cyMroinI0@public.gmane.org>
Cc: Jarkko Nikula <jhnikula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>
Cc: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi-sMOQStClEysAvxtiuMwx3w@public.gmane.org>
Signed-off-by: Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
---
 arch/arm/plat-omap/i2c.c      |   55 ++++++++++++++++++++++++++++++++---------
 drivers/i2c/busses/i2c-omap.c |   25 +++++++++++++++---
 include/linux/i2c-omap.h      |    9 ++++++
 3 files changed, 73 insertions(+), 16 deletions(-)
 create mode 100644 include/linux/i2c-omap.h

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 624e262..36011a1 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,9 +26,12 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
+
 #include <mach/irqs.h>
 #include <plat/mux.h>
 #include <plat/i2c.h>
+#include <plat/omap-pm.h>
 
 #define OMAP_I2C_SIZE		0x3f
 #define OMAP1_I2C_BASE		0xfffb3800
@@ -70,19 +73,44 @@ static struct resource i2c_resources[][2] = {
 		},					\
 	}
 
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
+static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
 static struct platform_device omap_i2c_devices[] = {
-	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
+	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
 #if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
+	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
 #endif
 #if	defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
+	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
 #endif
 };
 
 #define OMAP_I2C_CMDLINE_SETUP	(BIT(31))
 
+#ifdef CONFIG_ARCH_OMAP3
+/*
+ * omap_i2c_set_wfc_mpu_wkup_lat - sets mpu wake up constraint
+ * @dev:	i2c bus device pointer
+ * @val:	latency constraint to set, -1 to disable constraint
+ *
+ * When waiting for completion of a i2c transfer, we need to set a wake up
+ * latency constraint for the MPU. This is to ensure quick enough wakeup from
+ * idle, when transfer completes.
+ */
+static void omap_i2c_set_wfc_mpu_wkup_lat(struct device *dev, int val)
+{
+	omap_pm_set_max_mpu_wakeup_lat(dev, val);
+}
+#endif
+
+static void __init omap_set_i2c_constraint_func(
+				struct omap_i2c_bus_platform_data *pd)
+{
+	if (cpu_is_omap34xx())
+		pd->set_mpu_wkup_lat = omap_i2c_set_wfc_mpu_wkup_lat;
+	else
+		pd->set_mpu_wkup_lat = NULL;
+}
+
 static int __init omap_i2c_nr_ports(void)
 {
 	int ports = 0;
@@ -146,8 +174,8 @@ static int __init omap_i2c_bus_setup(char *str)
 	get_options(str, 3, ints);
 	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 		return 0;
-	i2c_rate[ints[1] - 1] = ints[2];
-	i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+	i2c_pdata[ints[1] - 1].clkrate = ints[2];
+	i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 
 	return 1;
 }
@@ -161,9 +189,10 @@ static int __init omap_register_i2c_bus_cmdline(void)
 {
 	int i, err = 0;
 
-	for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
-		if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
-			i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
+		if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
+			i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
+			omap_set_i2c_constraint_func(&i2c_pdata[i]);
 			err = omap_i2c_add_bus(i + 1);
 			if (err)
 				goto out;
@@ -197,9 +226,11 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			return err;
 	}
 
-	if (!i2c_rate[bus_id - 1])
-		i2c_rate[bus_id - 1] = clkrate;
-	i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+	if (!i2c_pdata[bus_id - 1].clkrate)
+		i2c_pdata[bus_id - 1].clkrate = clkrate;
+
+	omap_set_i2c_constraint_func(&i2c_pdata[bus_id - 1]);
+	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 
 	return omap_i2c_add_bus(bus_id);
 }
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index c7c2375..63a4a61 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -37,6 +37,7 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/i2c-omap.h>
 
 /* I2C controller revisions */
 #define OMAP_I2C_REV_2			0x20
@@ -166,6 +167,9 @@ struct omap_i2c_dev {
 	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
 	struct resource		*ioarea;
+	u32			latency;	/* maximum mpu wkup latency */
+	void			(*set_mpu_wkup_lat)(struct device *dev,
+						    int latency);
 	u32			speed;		/* Speed of bus in Khz */
 	u16			cmd_err;
 	u8			*buf;
@@ -538,8 +542,12 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
 	 * REVISIT: We should abort the transfer on signals, but the bus goes
 	 * into arbitration and we're currently unable to recover from it.
 	 */
+	if (dev->set_mpu_wkup_lat != NULL)
+		dev->set_mpu_wkup_lat(dev->dev, dev->latency);
 	r = wait_for_completion_timeout(&dev->cmd_complete,
 					OMAP_I2C_TIMEOUT);
+	if (dev->set_mpu_wkup_lat != NULL)
+		dev->set_mpu_wkup_lat(dev->dev, -1);
 	dev->buf_len = 0;
 	if (r < 0)
 		return r;
@@ -856,6 +864,7 @@ omap_i2c_probe(struct platform_device *pdev)
 	struct omap_i2c_dev	*dev;
 	struct i2c_adapter	*adap;
 	struct resource		*mem, *irq, *ioarea;
+	struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data;
 	irq_handler_t isr;
 	int r;
 	u32 speed = 0;
@@ -885,10 +894,13 @@ omap_i2c_probe(struct platform_device *pdev)
 		goto err_release_region;
 	}
 
-	if (pdev->dev.platform_data != NULL)
-		speed = *(u32 *)pdev->dev.platform_data;
-	else
-		speed = 100;	/* Defualt speed */
+	if (pdata != NULL) {
+		speed = pdata->clkrate;
+		dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
+	} else {
+		speed = 100;	/* Default speed */
+		dev->set_mpu_wkup_lat = NULL;
+	}
 
 	dev->speed = speed;
 	dev->idle = 1;
@@ -923,6 +935,11 @@ omap_i2c_probe(struct platform_device *pdev)
 		 */
 		dev->fifo_size = (dev->fifo_size / 2);
 		dev->b_hw = 1; /* Enable hardware fixes */
+
+		/* calculate wakeup latency constraint for MPU */
+		if (dev->set_mpu_wkup_lat != NULL)
+			dev->latency = (1000000 * dev->fifo_size) /
+				       (1000 * speed / 8);
 	}
 
 	if (cpu_is_omap7xx())
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h
new file mode 100644
index 0000000..1362fba
--- /dev/null
+++ b/include/linux/i2c-omap.h
@@ -0,0 +1,9 @@
+#ifndef __I2C_OMAP_H__
+#define __I2C_OMAP_H__
+
+struct omap_i2c_bus_platform_data {
+	u32		clkrate;
+	void		(*set_mpu_wkup_lat)(struct device *dev, int set);
+};
+
+#endif
-- 
1.7.0.2

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Tony Lindgren]

* Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org> [100311 08:36]:
> Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:
> >
> > Anyways, for the future, considering how critical this driver is
> > for all omaps.. And considering how badly this driver needs some
> > updates done..
> >
> > How about we pile up the i2c-omap patches for testing into linux-omap
> > branch first, then ask Ben to pull it around -rc6 after we've all
> > acked and tested the changes?
> >
> > Ben does that sound OK to you?
> 
> Here's another one to add to omap-testing then.
> 
> This one has been submitted to linux-i2c a couple times and been in
> the OMAP PM branch for a while.

OK, let's add that to omap-testing after we're done with the initial
fixes. This does not currently apply on top of omap-testing, BTW.

Regards,

Tony

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Kevin Hilman]

Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:

> * Kevin Hilman <khilman-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org> [100311 08:36]:
>> Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> writes:
>> >
>> > Anyways, for the future, considering how critical this driver is
>> > for all omaps.. And considering how badly this driver needs some
>> > updates done..
>> >
>> > How about we pile up the i2c-omap patches for testing into linux-omap
>> > branch first, then ask Ben to pull it around -rc6 after we've all
>> > acked and tested the changes?
>> >
>> > Ben does that sound OK to you?
>> 
>> Here's another one to add to omap-testing then.
>> 
>> This one has been submitted to linux-i2c a couple times and been in
>> the OMAP PM branch for a while.
>
> OK, let's add that to omap-testing after we're done with the initial
> fixes. This does not currently apply on top of omap-testing, BTW.

The patch is against v2.6.34-rc1.

Kevin

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Kevin Hilman]

Tony Lindgren <tony@atomide.com> writes:

[...]

>> 
>> Here's another one to add to omap-testing then.
>> 
>> This one has been submitted to linux-i2c a couple times and been in
>> the OMAP PM branch for a while.
>
> OK, let's add that to omap-testing after we're done with the initial
> fixes. This does not currently apply on top of omap-testing, BTW.

Here's an updated version that applies on omap-testing.

Kevin


>From 5e5fcf4322b04e27698f1ae48d12ae788969ea49 Mon Sep 17 00:00:00 2001
From: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Date: Wed, 21 Oct 2009 14:51:21 +0300
Subject: [PATCH] i2c-omap: add mpu wake up latency constraint in i2c

While waiting for completion of the i2c transfer, the
MPU could hit OFF mode and cause several msecs of
delay that made i2c transfers fail more often. The
extra delays and subsequent re-trys cause i2c clocks
to be active more often. This has also an negative
effect on power consumption.

Created a mechanism for passing and using the
constraint setting function in driver code. The used
mpu wake up latency constraints are now set individually
per bus, and they are calculated based on clock rate
and fifo size.

Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley,
and Nishanth Menon for tuning out the details of
this patch.

Cc: Moiz Sonasath <m-sonasath@ti.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
---
 arch/arm/plat-omap/i2c.c      |   55 ++++++++++++++++++++++++++++++++---------
 drivers/i2c/busses/i2c-omap.c |   24 +++++++++++++++---
 include/linux/i2c-omap.h      |    9 ++++++
 3 files changed, 72 insertions(+), 16 deletions(-)
 create mode 100644 include/linux/i2c-omap.h

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 624e262..36011a1 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,9 +26,12 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
+
 #include <mach/irqs.h>
 #include <plat/mux.h>
 #include <plat/i2c.h>
+#include <plat/omap-pm.h>
 
 #define OMAP_I2C_SIZE		0x3f
 #define OMAP1_I2C_BASE		0xfffb3800
@@ -70,19 +73,44 @@ static struct resource i2c_resources[][2] = {
 		},					\
 	}
 
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
+static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
 static struct platform_device omap_i2c_devices[] = {
-	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
+	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
 #if	defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
+	I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
 #endif
 #if	defined(CONFIG_ARCH_OMAP3)
-	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
+	I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
 #endif
 };
 
 #define OMAP_I2C_CMDLINE_SETUP	(BIT(31))
 
+#ifdef CONFIG_ARCH_OMAP3
+/*
+ * omap_i2c_set_wfc_mpu_wkup_lat - sets mpu wake up constraint
+ * @dev:	i2c bus device pointer
+ * @val:	latency constraint to set, -1 to disable constraint
+ *
+ * When waiting for completion of a i2c transfer, we need to set a wake up
+ * latency constraint for the MPU. This is to ensure quick enough wakeup from
+ * idle, when transfer completes.
+ */
+static void omap_i2c_set_wfc_mpu_wkup_lat(struct device *dev, int val)
+{
+	omap_pm_set_max_mpu_wakeup_lat(dev, val);
+}
+#endif
+
+static void __init omap_set_i2c_constraint_func(
+				struct omap_i2c_bus_platform_data *pd)
+{
+	if (cpu_is_omap34xx())
+		pd->set_mpu_wkup_lat = omap_i2c_set_wfc_mpu_wkup_lat;
+	else
+		pd->set_mpu_wkup_lat = NULL;
+}
+
 static int __init omap_i2c_nr_ports(void)
 {
 	int ports = 0;
@@ -146,8 +174,8 @@ static int __init omap_i2c_bus_setup(char *str)
 	get_options(str, 3, ints);
 	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 		return 0;
-	i2c_rate[ints[1] - 1] = ints[2];
-	i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+	i2c_pdata[ints[1] - 1].clkrate = ints[2];
+	i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 
 	return 1;
 }
@@ -161,9 +189,10 @@ static int __init omap_register_i2c_bus_cmdline(void)
 {
 	int i, err = 0;
 
-	for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
-		if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
-			i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
+		if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
+			i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
+			omap_set_i2c_constraint_func(&i2c_pdata[i]);
 			err = omap_i2c_add_bus(i + 1);
 			if (err)
 				goto out;
@@ -197,9 +226,11 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			return err;
 	}
 
-	if (!i2c_rate[bus_id - 1])
-		i2c_rate[bus_id - 1] = clkrate;
-	i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+	if (!i2c_pdata[bus_id - 1].clkrate)
+		i2c_pdata[bus_id - 1].clkrate = clkrate;
+
+	omap_set_i2c_constraint_func(&i2c_pdata[bus_id - 1]);
+	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 
 	return omap_i2c_add_bus(bus_id);
 }
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index f2019d2..7a80b00 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -37,6 +37,7 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/i2c-omap.h>
 
 /* I2C controller revisions */
 #define OMAP_I2C_REV_2			0x20
@@ -174,6 +175,9 @@ struct omap_i2c_dev {
 	struct clk		*fclk;		/* Functional clock */
 	struct completion	cmd_complete;
 	struct resource		*ioarea;
+	u32			latency;	/* maximum mpu wkup latency */
+	void			(*set_mpu_wkup_lat)(struct device *dev,
+						    int latency);
 	u32			speed;		/* Speed of bus in Khz */
 	u16			cmd_err;
 	u8			*buf;
@@ -602,8 +606,12 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
 	 * REVISIT: We should abort the transfer on signals, but the bus goes
 	 * into arbitration and we're currently unable to recover from it.
 	 */
+	if (dev->set_mpu_wkup_lat != NULL)
+		dev->set_mpu_wkup_lat(dev->dev, dev->latency);
 	r = wait_for_completion_timeout(&dev->cmd_complete,
 					OMAP_I2C_TIMEOUT);
+	if (dev->set_mpu_wkup_lat != NULL)
+		dev->set_mpu_wkup_lat(dev->dev, -1);
 	dev->buf_len = 0;
 	if (r < 0)
 		return r;
@@ -926,6 +934,7 @@ omap_i2c_probe(struct platform_device *pdev)
 	struct omap_i2c_dev	*dev;
 	struct i2c_adapter	*adap;
 	struct resource		*mem, *irq, *ioarea;
+	struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data;
 	irq_handler_t isr;
 	int r;
 	u32 speed = 0;
@@ -955,10 +964,13 @@ omap_i2c_probe(struct platform_device *pdev)
 		goto err_release_region;
 	}
 
-	if (pdev->dev.platform_data != NULL)
-		speed = *(u32 *)pdev->dev.platform_data;
-	else
-		speed = 100;	/* Defualt speed */
+	if (pdata != NULL) {
+		speed = pdata->clkrate;
+		dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
+	} else {
+		speed = 100;	/* Default speed */
+		dev->set_mpu_wkup_lat = NULL;
+	}
 
 	dev->speed = speed;
 	dev->idle = 1;
@@ -1011,6 +1023,10 @@ omap_i2c_probe(struct platform_device *pdev)
 			dev->fifo_size = (dev->fifo_size / 2);
 			dev->b_hw = 1; /* Enable hardware fixes */
 		}
+		/* calculate wakeup latency constraint for MPU */
+		if (dev->set_mpu_wkup_lat != NULL)
+			dev->latency = (1000000 * dev->fifo_size) /
+				       (1000 * speed / 8);
 	}
 
 	/* reset ASAP, clearing any IRQs */
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h
new file mode 100644
index 0000000..1362fba
--- /dev/null
+++ b/include/linux/i2c-omap.h
@@ -0,0 +1,9 @@
+#ifndef __I2C_OMAP_H__
+#define __I2C_OMAP_H__
+
+struct omap_i2c_bus_platform_data {
+	u32		clkrate;
+	void		(*set_mpu_wkup_lat)(struct device *dev, int set);
+};
+
+#endif
-- 
1.7.0.2

Re: [PATCH v2] [I2C-OMAP] Add support for 16-bit registers

[Jarkko Nikula]

On Wed, 10 Mar 2010 14:30:00 -0800
Tony Lindgren <tony@atomide.com> wrote:

> * Kevin Hilman <khilman@deeprootsystems.com> [100310 10:01]:
> > Tony Lindgren <tony@atomide.com> writes:
> > 
...
> > Unfortunately, Tony's additional fix did not make it into the version
> > that was merged to mainline, which results in a crash during
> > probe when using v2.6.34-rc1.
> > 
> > Ben, can you queue the fix below from Tony for -rc2?
> 
> The original patch attached again below.
> 
FWIW,

Tony's "[PATCH] i2c-omap: Fix reg_shift init" makes the mainline
2.6.34-rc1 booting on OMAP3.

Tested-by: Jarkko Nikula <jhnikula@gmail.com>