From: Kevin Hilman <khilman@linaro.org>
To: Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com>
Cc: Tony Lindgren <tony@atomide.com>,
Wolfram Sang <wsa@the-dreams.de>,
linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register
Date: Thu, 30 May 2013 07:18:26 -0700 [thread overview]
Message-ID: <87obbsa6vh.fsf@linaro.org> (raw)
In-Reply-To: <51A71375.9030100@ti.com> (Oleksandr Dmytryshyn's message of "Thu, 30 May 2013 11:53:09 +0300")
Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:
> On 05/29/2013 08:22 PM, Kevin Hilman wrote:
>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com> writes:
>>
>>> Starting from the OMAP chips with version2 registers scheme there are
>>> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage
>>> interrupts instead of the older OMAP chips with old scheme which have
>>> only one register (I2C_IE). Now we should use I2C_IRQENABLE_SET
>>> register for enabling interrupts and I2C_IRQENABLE_CLR register for
>>> disabling interrupts.
>> Why? (changelogs should always answer the "why" question)
>>
>> IOW, what is broken without this change, how does it fail? And equally
>> important, how is it currently working?
>>
>> Kevin
>>
>>
> Hi, Kevin.
>
> If the i2c controller during suspend will generate an interrupt, it
> can lead to unpredictable behaviour in the kernel.
>
> Based on the logic of the kernel code interrupts from i2c should be
> prohibited during suspend. Kernel writes 0 to the I2C_IE register in
> the omap_i2c_runtime_suspend() function. In the other side kernel
> writes saved interrupt flags to the I2C_IE register in
> omap_i2c_runtime_resume() function. I.e. interrupts should be disabled
> during suspend.
>
> This works for chips with version1 registers scheme. Interrupts are
> disabled during suspend. For chips with version2 scheme registers
> writting 0 to the I2C_IE register does nothing (because now the
> I2C_IRQENABLE_SET register is located at this address ). This register
> is used to enable interrupts. For disabling interrupts
> I2C_IRQENABLE_CLR register should be used.
>
> I've checked that interrupts in the i2c controller are still enabled
> after writting 0 to the I2C_IE register. But with my patch interrupts
> are disabled in the omap_i2c_runtime_suspend() function.
Yes, I understand why your patch works, and it looks correct to me.
My main concern is that the changelog is missing a detailed description
of the problem that is being solved, as well as a summary of why this
has ever worked. I guess we've just been lucky and not seen interrupts
during suspend?
Kevin
next prev parent reply other threads:[~2013-05-30 14:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-29 7:35 [PATCH 0/1] i2c: omap: correct usage of the interrupt enable register Oleksandr Dmytryshyn
2013-05-29 7:35 ` [PATCH 1/1] " Oleksandr Dmytryshyn
[not found] ` <1369812944-685-2-git-send-email-oleksandr.dmytryshyn-l0cyMroinI0@public.gmane.org>
2013-05-29 17:22 ` Kevin Hilman
[not found] ` <878v2x7lak.fsf-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2013-05-30 8:53 ` Oleksandr Dmytryshyn
2013-05-30 14:18 ` Kevin Hilman [this message]
[not found] ` <87obbsa6vh.fsf-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2013-05-30 15:42 ` Oleksandr Dmytryshyn
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