From: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com>
To: Kathiravan Thirumoorthy
<kathiravan.thirumoorthy@oss.qualcomm.com>,
Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>,
Andi Shyti <andi.shyti@kernel.org>,
Manikanta Mylavarapu <quic_mmanikan@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] i2c: qcom-geni: Add I2C frequency table for firmware-based SEs
Date: Tue, 11 Aug 2026 18:12:55 +0530 [thread overview]
Message-ID: <962122da-47cd-4325-9ced-ecbee2281580@oss.qualcomm.com> (raw)
In-Reply-To: <20260811-ipq5424_i2c_scl_updates-v1-2-bddcb2ceebda@oss.qualcomm.com>
On 8/11/2026 2:53 PM, Kathiravan Thirumoorthy wrote:
> On IPQ5424, RTL-based I2C can be supported by both minicore and firmware
> based SEs. For firmware-based SEs, use different SCL settings as
> recommended by the design team. Introduce a separate table for the same.
>
> Identify whether the SE is minicore or firmware-based and select the
what is minicore ? Please Make it upstream specific, RTL hardened or
define minicore first.
> appropriate frequency table to achieve the desired bus frequencies.
>
> Move geni_i2c_clk_map_idx() from geni_i2c_resources_init() to
> geni_i2c_init() to ensure SE_HW_PARAM_2 is accessed only after the
Reasoning required - why only for 32 MHz ? OR better reasoning for 32Mhz
support related changes.
> required clocks have been enabled.
>
I suggest to add 32Mhz support as this is already having 19.2MHz
support. Subject shows generic frequency support sounding like no
support present.
> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
> ---
> drivers/i2c/busses/i2c-qcom-geni.c | 23 +++++++++++++++++------
> include/linux/soc/qcom/geni-se.h | 1 +
> 2 files changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 00013b41a6f5..2f3026602c0c 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> @@ -194,12 +194,21 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = {
rename to _minicore ?
> {}
> };
>
> +static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz_fwcore[] = {
> + { I2C_MAX_STANDARD_MODE_FREQ, 12, 9, 10, 25 },
> + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 18 },
> + { I2C_MAX_FAST_MODE_PLUS_FREQ, 1, 6, 15, 29 },
> + {}
> +};
> +
> static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi2c)
> {
> const struct geni_i2c_clk_fld *itr;
> + bool is_minicore = FIELD_GET(GEN_USE_MINICORES,
> + readl_relaxed(gi2c->se.base + SE_HW_PARAM_2));
>
> if (clk_get_rate(gi2c->se.clk) == 32 * HZ_PER_MHZ)
> - itr = geni_i2c_clk_map_32mhz;
> + itr = is_minicore ? geni_i2c_clk_map_32mhz : geni_i2c_clk_map_32mhz_fwcore;
_minicore with above table renamed.
> else
> itr = geni_i2c_clk_map_19p2mhz;
>
> @@ -1046,6 +1055,13 @@ static int geni_i2c_init(struct geni_i2c_dev *gi2c)
[...]
next prev parent reply other threads:[~2026-08-11 12:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-11 9:23 [PATCH 0/2] I2C SCL counter updates for Qualcomm IPQ5424 SoC Kathiravan Thirumoorthy
2026-08-11 9:23 ` [PATCH 1/2] i2c: qcom-geni: update frequency table to fix timing parameters Kathiravan Thirumoorthy
2026-08-11 12:42 ` Mukesh Savaliya
2026-08-11 15:56 ` Kathiravan Thirumoorthy
2026-08-11 9:23 ` [PATCH 2/2] i2c: qcom-geni: Add I2C frequency table for firmware-based SEs Kathiravan Thirumoorthy
2026-08-11 12:42 ` Mukesh Savaliya [this message]
2026-08-11 15:59 ` Kathiravan Thirumoorthy
2026-08-11 12:41 ` [PATCH 0/2] I2C SCL counter updates for Qualcomm IPQ5424 SoC Mukesh Savaliya
2026-08-11 16:00 ` Kathiravan Thirumoorthy
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