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Fri, 30 Aug 2024 14:58:59 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47UEwwPD011056 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Aug 2024 14:58:58 GMT Received: from [10.110.28.107] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 30 Aug 2024 07:58:55 -0700 Message-ID: <9befe692-a05d-4fa0-9ff9-8d6030e4cb66@quicinc.com> Date: Fri, 30 Aug 2024 07:58:54 -0700 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for SA8255p Ride platform Content-Language: en-US To: Krzysztof Kozlowski , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20240828203721.2751904-1-quic_nkela@quicinc.com> <20240828203721.2751904-23-quic_nkela@quicinc.com> <746be896-8798-44b0-aa86-e77cf34655e1@kernel.org> <57eee144-cdc4-48e7-838b-103cda6ec1dd@quicinc.com> <095f5048-5c39-438d-b5a9-7519199a8e9f@kernel.org> From: Nikunj Kela In-Reply-To: <095f5048-5c39-438d-b5a9-7519199a8e9f@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: SkQErJ6yG1XnlEy5h9kGSvc-Bpyu79A9 X-Proofpoint-ORIG-GUID: SkQErJ6yG1XnlEy5h9kGSvc-Bpyu79A9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-30_09,2024-08-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 phishscore=0 adultscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0 spamscore=0 bulkscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408300114 On 8/30/2024 2:51 AM, Krzysztof Kozlowski wrote: > On 29/08/2024 21:06, Nikunj Kela wrote: >> On 8/29/2024 12:49 AM, Krzysztof Kozlowski wrote: >>> On 28/08/2024 22:37, Nikunj Kela wrote: >>>> SA8255p Ride platform is an automotive virtual platform. This platform >>>> abstracts resources such as clocks, regulators etc. in the firmware VM. >>>> The device drivers request resources operations over SCMI using power, >>>> performance, reset and sensor protocols. >>>> >>>> Multiple virtual SCMI instances are being employed for greater parallelism. >>>> These instances are tied to devices such that devices can have dedicated >>>> SCMI channel. Firmware VM (runs SCMI platform stack) is SMP enabled and >>>> can process requests from agents in parallel. Qualcomm smc transport is >>>> used for communication between SCMI agent and platform. >>>> >>>> Let's add the reduced functional support for SA8255p Ride board. >>>> Subsequently, the support for PCIe, USB, UFS, Ethernet will be added. >>>> >>>> Co-developed-by: Shazad Hussain >>>> Signed-off-by: Shazad Hussain >>>> Signed-off-by: Nikunj Kela >>>> --- >>>> arch/arm64/boot/dts/qcom/Makefile | 1 + >>>> arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi | 80 + >>>> arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 149 ++ >>>> arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi | 2312 ++++++++++++++++++ >>>> arch/arm64/boot/dts/qcom/sa8255p.dtsi | 2405 +++++++++++++++++++ >>>> 5 files changed, 4947 insertions(+) >>>> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi >>>> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-ride.dts >>>> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi >>>> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p.dtsi >>>> >>> ... >>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-ride.dts b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts >>>> new file mode 100644 >>>> index 000000000000..1dc03051ad92 >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts >>>> @@ -0,0 +1,149 @@ >>>> +// SPDX-License-Identifier: BSD-3-Clause >>>> +/* >>>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. >>>> + */ >>>> + >>>> +/dts-v1/; >>>> + >>>> +#include >>>> + >>>> +#include "sa8255p.dtsi" >>>> +#include "sa8255p-pmics.dtsi" >>>> +#include "sa8255p-scmi.dtsi" >>>> + >>>> +/ { >>>> + model = "Qualcomm Technologies, Inc. SA8255P Ride"; >>>> + compatible = "qcom,sa8255p-ride", "qcom,sa8255p"; >>>> + >>>> + aliases { >>>> + i2c11 = &i2c11; >>>> + i2c18 = &i2c18; >>>> + serial0 = &uart10; >>>> + serial1 = &uart4; >>>> + spi16 = &spi16; >>>> + scmichannels = &scmichannels; >>> Nothing parses this. >>> >> We are using this alias in bootloader to speed up the parsing. Since we > Then please provide link to the bindings in this open-source upstream > bootloader. > > Otherwise it is a clear no-go for me. We don't add properties because > some downstream wants them. Imagine what would happen if we opened that > can of worms... Point taken! I will remove this alias and label from DT in next version. We can add it back if/once the bootloader changes are upstreamed. Thanks! >> are using 64 SCMI instances and SCMI smc transport driver for >> Qualcomm(drivers/firmware/arm_scmi/transports/smc.c) expects >> cap-id(created by hypervisor at boot time), our bootloader gets those >> cap-id for each channel and populate them. This alias is an optimization >> to save boottime as in automotive, boot KPIs are critical. > I will refrain about commenting on KPIs... > > > > Best regards, > Krzysztof >