Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR

Serge Semin
2023-10-31T13:06:22Z

On Tue, Oct 31, 2023 at 02:10:13PM +0200, Jarkko Nikula wrote:
> On 10/31/23 10:44, Yann Sionneau wrote:
> >
> > Le 31/10/2023 à 01:12, Jan Bottorff a écrit :
> > > On 10/26/2023 4:18 AM, Wolfram Sang wrote:
> > > > So, someone wants to come up with a patch to move to non-relaxed io
> > > > accessors?
> > > >
> > > Is the current thinking to just make writes to DW_IC_INTR_MASK use
> > > the non-relaxed variant or something more broad?
> > >
> > > From a safest functioning viewpoint, we talked about making all
> > > accessors default to non-relaxed variants. A couple of pretty good
> > > arguments from knowledgeable people favored this. I know there also
> > > was some concerns about potential performance impact this might have
> > > although the counter argument was this is a pretty low speed device
> > > so some extra cpu cycles on register accesses were not likely to
> > > degrade overall performance.
> > >
> > > I could make the patch if we have consensus (or maintainers
> > > decision) on which way to go: 1) only writes to DW_IC_INTR_MASK are
> > > non-relaxed, 2) make all read/write accessors use the non-relaxed
> > > version.
> > >
> > > I'm personally in camp #2, safety first, performance fine tuning
> > > later if needed. Latent missing barrier bugs are difficult and time
> > > consuming to find.
> >
> > Fine with me, let's go for #2 :)
> >
> Also simplicity votes for #2.

+1 for the option #2. Let's do it and be finally over with this
patch.)

-Serge(y)