Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR

Yann Sionneau
2023-09-19T12:38:44Z

Hi,

On 9/19/23 12:19, Wolfram Sang wrote:
>> I also agree that a wmb() in the i2c driver is not the more elegant fix.
>> For similar reasons, we hid barriers in the write*() macros, drivers
>> need to stay architecture-agnostic as much as possible.
> Exactly my thinking. I wanted to read this patch discussion later this
> week. But from glimpsing at it so far, I already wondered why there
> isn't a memory barrier in the final accessor to the register.

The regmap accessors used by the designware driver end up calling
writel_relaxed() and readl_relaxed() :
https://elixir.bootlin.com/linux/v6.6-rc2/source/drivers/i2c/busses/i2c-designware-common.c#L71

Those usually end up just being volatile accesses, making some kind of
compiler barrier preventing the memory mapped register accesses to be
moved/removed/merged.

I kind of think it's OK. It starts not being OK when you want some
ordering between those and some memory accesses in DDR like the problem
discussed here.

In those cases I would say the smp_* barriers are what we are supposed
to use, isn't it?

Regards,

--

Yann