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From: Robert Abel <rabel-Ejy783gw450hGw5VS8l+XCM2BslAju9D@public.gmane.org>
To: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Cc: wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 6/6] i2c: Xilinx IIC: add DT Endianness support
Date: Mon, 3 Aug 2015 09:46:21 +0200	[thread overview]
Message-ID: <CAMdRc4ED6YcuAitpDPR+eSp9+5uK0sSfO3GvLtYvo+NbuK=KwQ@mail.gmail.com> (raw)
In-Reply-To: <55BEFCE5.70109-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>

Hi Michal,

On Mon, Aug 3, 2015 at 7:32 AM, Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> wrote:
> NACK for this. Previous driver version did automatic detection directly
> on the IP. You are changing it to be OF driven with is error prone and
> highly depends on user.

I beg do differ. Using the appropriate dt binary attributes is not
error prone. On the contrary, it gives the user much tighter control.

I find the solution I replaced more of a hack than anything. It writes
to reserved bits, which -- while unlikely -- might become used in
future versions of this IP.
If there was some fixed identification register, sure, this might be okay.

If you want to retain this functionality, we might put it in using
another CONFIG_I2C_XILINX_XXX option. How's that?

Regards,

Robert

  parent reply	other threads:[~2015-08-03  7:46 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-31 12:00 [PATCH 0/6] i2c: Xilinx IIC: rework driver Robert ABEL
     [not found] ` <1438344034-20211-1-git-send-email-rabel-Ejy783gw450hGw5VS8l+XCM2BslAju9D@public.gmane.org>
2015-07-31 12:00   ` [PATCH 0/6] i2c: Xilinx IIC: rename register defines Robert ABEL
2015-07-31 12:00   ` [PATCH 1/6] i2c: Xilinx IIC: remove Endianness hack Robert ABEL
2015-07-31 12:00   ` [PATCH 2/6] i2x: Xilinx IIC: remove non-initial tabs Robert ABEL
2015-07-31 12:00   ` [PATCH 3/6] i2c: Xilinx IIC: make all ioread/write calls 32-bit Robert ABEL
2015-07-31 12:00   ` [PATCH 4/6] i2c: Xilinx IIC: completely redo FSM/ISR logic Robert ABEL
2015-07-31 12:00   ` [PATCH 5/6] i2c: Xilinx IIC: make reset after TX error configurable Robert ABEL
     [not found]     ` <1438344034-20211-7-git-send-email-rabel-Ejy783gw450hGw5VS8l+XCM2BslAju9D@public.gmane.org>
2015-08-03  5:34       ` Michal Simek
     [not found]         ` <55BEFD63.6090108-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-03  7:50           ` Robert Abel
     [not found]             ` <CAMdRc4F__S-dQOOsZv0pUtER5+-kwH=Mt+wfanvJXHWqS=YRMA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-06  9:18               ` Michal Simek
     [not found]                 ` <55C32666.6070304-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-06  9:40                   ` Robert Abel
2015-07-31 12:00   ` [PATCH 6/6] i2c: Xilinx IIC: add DT Endianness support Robert ABEL
     [not found]     ` <1438344034-20211-8-git-send-email-rabel-Ejy783gw450hGw5VS8l+XCM2BslAju9D@public.gmane.org>
2015-08-03  5:32       ` Michal Simek
     [not found]         ` <55BEFCE5.70109-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-03  7:46           ` Robert Abel [this message]
2015-08-03  5:26   ` [PATCH 0/6] i2c: Xilinx IIC: rework driver Michal Simek
     [not found]     ` <55BEFB87.1090909-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-03  7:30       ` Robert Abel
     [not found]         ` <CAMdRc4EKRQki+Pm-Et29FyaKARkiCeNGsGYMAQFVyYyvxW2EOg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-03  7:44           ` Michal Simek
     [not found]             ` <55BF1BF5.4010809-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2015-08-03  7:56               ` Robert Abel
     [not found] ` <CAKfKVtG6rRyb70Mxe46Rd9czkx6kSaf91pTeysRf78vtpypFBA@mail.gmail.com>
     [not found]   ` <CAMdRc4EmQN7SAxgcuauowuz5vOvNn2QYsv99=yUNQOSFRVVr8Q@mail.gmail.com>
     [not found]     ` <CAMdRc4EmQN7SAxgcuauowuz5vOvNn2QYsv99=yUNQOSFRVVr8Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-07-31 20:53       ` Fwd: " Robert Abel

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