Re: [PATCH v2 2/2] i2c: Add Renesas RZ/V2M controller

[Geert Uytterhoeven <geert@linux-m68k.org>]

Hi Andy,

On Tue, Jun 28, 2022 at 11:08 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Tue, Jun 28, 2022 at 08:45:26PM +0100, Phil Edworthy wrote:
> > Yet another i2c controller from Renesas that is found on the RZ/V2M
> > (r9a09g011) SoC. It can support only 100kHz and 400KHz operation.

> > +static int rzv2m_i2c_send(struct rzv2m_i2c_priv *priv, struct i2c_msg *msg,
> > +                       unsigned int *count)
> > +{
> > +     unsigned int i;
> > +     int ret = 0;
>
> Redundant assignment, you may return 0 directly.

Can you prove msg->len is never zero, and the loop below is always
executed at least once?
The driver does set I2C_AQ_NO_ZERO_LEN, but I don't think the static
checkers know ;-)

>
> > +     for (i = 0; i < msg->len; i++) {
> > +             ret = rzv2m_i2c_write_with_ack(priv, msg->buf[i]);
> > +             if (ret < 0)
> > +                     return ret;
> > +     }
> > +     *count = i;
> > +
> > +     return ret;
> > +}

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds