From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 776AEC4332F for ; Wed, 14 Dec 2022 11:43:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238010AbiLNLnR (ORCPT ); Wed, 14 Dec 2022 06:43:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238332AbiLNLms (ORCPT ); Wed, 14 Dec 2022 06:42:48 -0500 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BCF420F7D; Wed, 14 Dec 2022 03:42:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671018149; x=1702554149; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=ABJWidSLQnkvGeJdDDPuZHC7hKijESz9RFton+Q9SLo=; b=jocMIDxwA0wsCpe7lxqJYXP+vnQ15mdZsT7Erdsycgg/tKwqk47p8LKG VlxTCbNK2ObWk0uIUue9iufuaucvAXg2fCS+9mTEmQcKYBat96+hIG6KK fkj9aeCwiWeIwecSSb3O5Wno7xSnaSF3eRJCVgK9ToHoCkhgOiThotvWj 3GMip/VZ/GX9lhiBnp7qeULr0k+IENJtQY6zUnnYRaJA1UHgYfwcE9HJ9 GBMO9y2YCeeibCcy0rfLiJjIHRYkkS+7DPSub33+/IR8zJ6lRkjcizak/ mrFMvEMfga/KojfhjNwsv63YIxitn1tSU95MwchnKzW2XQs7cJyZQZfIM g==; X-IronPort-AV: E=McAfee;i="6500,9779,10560"; a="345451351" X-IronPort-AV: E=Sophos;i="5.96,244,1665471600"; d="scan'208";a="345451351" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Dec 2022 03:42:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10560"; a="681488896" X-IronPort-AV: E=Sophos;i="5.96,244,1665471600"; d="scan'208";a="681488896" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga001.jf.intel.com with ESMTP; 14 Dec 2022 03:42:24 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1p5Q9W-009mWy-3C; Wed, 14 Dec 2022 13:42:22 +0200 Date: Wed, 14 Dec 2022 13:42:22 +0200 From: Andy Shevchenko To: Hanna Hawa Cc: jarkko.nikula@linux.intel.com, mika.westerberg@linux.intel.com, jsd@semihalf.com, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, dwmw@amazon.co.uk, benh@amazon.com, ronenk@amazon.com, talel@amazon.com, jonnyc@amazon.com, hanochu@amazon.com, farbere@amazon.com, itamark@amazon.com Subject: Re: [PATCH 1/1] i2c: designware: add pinctrl for recovery info as an option Message-ID: References: <20221214102707.60018-1-hhhawa@amazon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221214102707.60018-1-hhhawa@amazon.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org On Wed, Dec 14, 2022 at 10:27:07AM +0000, Hanna Hawa wrote: > The current implementation of designware recovery mechanism fit for > specific device (Intel / Altera Cyclone V SOC) which have two separated > "wired" GPIOs to the i2c bus via the SOC FPGA for the i2c recovery. > > This change add ability to get the pinctrl for the i2c recovery in order > to switch between pin configuration (I2C and GPIO functionality) if the > pinctrl exists. ... > + rinfo->pinctrl = devm_pinctrl_get(dev->dev); > + if (IS_ERR(rinfo->pinctrl)) { > + if (PTR_ERR(rinfo->pinctrl) == -EPROBE_DEFER) > + return -EPROBE_DEFER; > + rinfo->pinctrl = NULL; > + dev_dbg(dev->dev, "can't get pinctrl for i2c recovery\n"); > + } Can you explain, why pinctrl_bind_pins() is not enough? (You may also refer to the ab78029ecc34 ("drivers/pinctrl: grab default handles from device core") for more details.) -- With Best Regards, Andy Shevchenko