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From: Wolfram Sang <wsa@kernel.org>
To: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Cc: linux-i2c@vger.kernel.org, michal.simek@xilinx.com,
	git@xilinx.com, Robert Hancock <robert.hancock@calian.com>,
	Chirag Parekh <chiragp@xilinx.com>
Subject: Re: [PATCH v2] i2c: cadence: Add standard bus recovery support
Date: Mon, 29 Nov 2021 13:00:22 +0100	[thread overview]
Message-ID: <YaTA1j/yrCe1gGOv@kunai> (raw)
In-Reply-To: <20211129090116.16628-1-shubhrajyoti.datta@xilinx.com>

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On Mon, Nov 29, 2021 at 02:31:16PM +0530, Shubhrajyoti Datta wrote:
> From: Robert Hancock <robert.hancock@calian.com>
> 
> Hook up the standard GPIO/pinctrl-based recovery support for this
> driver.
> 
> Based on a patch "i2c: cadence: Recover bus after controller reset" by
> Chirag Parekh in the Xilinx kernel Git tree, but simplified to make use
> of more common code.

Guys, sorry for the long delay.

>  	if (time_left == 0) {
> +		i2c_recover_bus(adap);

According to I2C specs, recovery should be done at the beginning of a
transfer when SDA is detected low. I think this makes sense because
other issues may have stalled the bus as well (e.g. broken bootloader).
Makes sense?


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  reply	other threads:[~2021-11-29 12:02 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-29  9:01 [PATCH v2] i2c: cadence: Add standard bus recovery support Shubhrajyoti Datta
2021-11-29 12:00 ` Wolfram Sang [this message]
2022-01-07 22:24   ` Robert Hancock
2022-02-23 16:51     ` Shubhrajyoti Datta
2022-04-12 10:16       ` Shubhrajyoti Datta
  -- strict thread matches above, loose matches on Subject: below --
2022-07-04  5:54 Shubhrajyoti Datta
2022-07-04 11:30 ` Michal Simek
2022-07-07 21:03 ` Wolfram Sang
2022-07-07 22:14   ` Robert Hancock
2022-07-14  7:22     ` Datta, Shubhrajyoti

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