Re: [PATCH v3 08/11] i2c: npcm: Correct register access width

Tali Perry
2022-03-03T12:54:42Z

> On Thu, Mar 03, 2022 at 04:31:38PM +0800, Tyrone Ting wrote:
> > From: Tyrone Ting <kfting@nuvoton.com>
> >
> > Use ioread8 instead of ioread32 to access the SMBnCTL3 register since
> > the register is only 8-bit wide.
>
> > Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
>
> No, this is bad commit message, since you have bitwise masks and there is
> nothing to fix from functional point of view. So, why is this a fix?
>

The next gen of this device is a 64 bit cpu.
The module is and was 8 bit.

The ioread32 that seemed to work smoothly on a 32 bit machine
was causing a panic on a 64 bit machine.
since the module is 8 bit we changed to ioread8.
This is working both for the 32 and 64 CPUs with no issue.

> > Signed-off-by: Tyrone Ting <kfting@nuvoton.com>
> > Signed-off-by: Tali Perry <tali.perry1@gmail.com>
>
> This is wrong SoB chain.
>
> ...
>
> > - return !!(I2CCTL3_SCL_LVL & ioread32(bus->reg + NPCM_I2CCTL3));
> > + return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3));
>
> ...
>
> > - return !!(I2CCTL3_SDA_LVL & ioread32(bus->reg + NPCM_I2CCTL3));
> > + return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3));
>
> --
> With Best Regards,
> Andy Shevchenko

Thanks Andy,

BR,
Tali Perry