Re: [PATCH v5 06/10] i2c: npcm: Correct register access width

Tyrone Ting
2022-05-21T12:58:26Z

Hi Wolfram:

Thank you for your help.

Wolfram Sang <wsa@kernel.org> 於 2022年5月21日 週六 下午1:53寫道：
>
> On Tue, May 17, 2022 at 06:11:38PM +0800, Tyrone Ting wrote:
> > From: Tyrone Ting <kfting@nuvoton.com>
> >
> > The SMBnCTL3 register is 8-bit wide and the 32-bit access was always
> > incorrect, but simply didn't cause a visible error on the 32-bit machine.
> >
> > On the 64-bit machine, the kernel message reports that ESR value is
> > 0x96000021. Checking Arm Architecture Reference Manual Armv8 suggests that
> > it's the alignment fault.
> >
> > SMBnCTL3's address is 0xE.
> >
> > Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
> > Signed-off-by: Tyrone Ting <kfting@nuvoton.com>
> > Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
>
> Applied to for-next, thanks!
>

Best Regards,
Tyrone