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[86.27.177.88]) by smtp.gmail.com with ESMTPSA id g20-20020a05600c4c9400b0039749b01ea7sm26101954wmp.32.2022.06.08.00.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jun 2022 00:42:42 -0700 (PDT) Date: Wed, 8 Jun 2022 08:42:40 +0100 From: Lee Jones To: Andy Shevchenko Cc: Tony Luck , Wolfram Sang , Jean Delvare , Heiner Kallweit , Henning Schild , Mika Westerberg , Hans de Goede , Linus Walleij , Jonathan Yong , Guenter Roeck , Wim Van Sebroeck , linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-i2c@vger.kernel.org, linux-leds@vger.kernel.org, linux-gpio@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-watchdog@vger.kernel.org, Borislav Petkov , Mauro Carvalho Chehab , James Morse , Robert Richter , Jean Delvare , Pavel Machek , Peter Tyser , Andy Shevchenko , Mark Gross Subject: Re: [PATCH v6 00/12] platform/x86: introduce p2sb_bar() helper Message-ID: References: <20220606164138.66535-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220606164138.66535-1-andriy.shevchenko@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org On Mon, 06 Jun 2022, Andy Shevchenko wrote: > There are a few users that would like to utilize P2SB mechanism of hiding > and unhiding a device from the PCI configuration space. > > Here is the series to consolidate p2sb handling code for existing users > and to provide a generic way for new comer(s). > > It also includes a patch to enable GPIO controllers on Apollo Lake > when it's used with ABL bootloader w/o ACPI support. > > The patch that brings the helper ("platform/x86/intel: Add Primary to > Sideband (P2SB) bridge support") has a commit message that sheds a light > on what the P2SB is and why this is needed. > > I have tested this on Apollo Lake platform (I'm able to see SPI NOR and > since we have an ACPI device for GPIO I do not see any attempts to recreate > one). > > The series is ready to be merged via MFD tree, but see below. > > The series also includes updates for Simatic IPC drivers that partially > tagged by respective maintainers (the main question is if Pavel is okay > with the last three patches, since I believe Hans is okay with removing > some code under PDx86). Hence the first 8 patches can be merged right > away and the rest when Pavel does his review. Can we just wait for Pavel's review, then merge them all at once? -- Lee Jones [李琼斯] Principal Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog