From: Wolfram Sang <wsa@kernel.org>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Jan Dabros <jsd@semihalf.com>
Subject: Re: [PATCH v2 1/2] i2c: designware-pci: Group AMD NAVI quirk parts together
Date: Sun, 2 Oct 2022 00:43:40 +0200 [thread overview]
Message-ID: <YzjCnJRJXXZHNHn0@shikoro> (raw)
In-Reply-To: <20220929094215.76236-1-andriy.shevchenko@linux.intel.com>
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On Thu, Sep 29, 2022 at 12:42:14PM +0300, Andy Shevchenko wrote:
> The code is ogranized in a way that all related parts
> to the certain platform quirk go together. This is not
> the case for AMD NAVI. Shuffle code to make it happen.
>
> While at it, drop the frequency definition and use
> hard coded value as it's done for other platforms and
> add a comment to the PCI ID list.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Applied to for-next, thanks!
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prev parent reply other threads:[~2022-10-01 22:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 9:42 [PATCH v2 1/2] i2c: designware-pci: Group AMD NAVI quirk parts together Andy Shevchenko
2022-09-29 9:42 ` [PATCH v2 2/2] i2c: designware-pci: Use standard pattern for memory allocation Andy Shevchenko
2022-10-01 22:43 ` Wolfram Sang
2022-10-01 22:43 ` Wolfram Sang [this message]
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