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Mon, 11 Nov 2024 16:51:48 -0800 (PST) Received: from archie.me ([103.124.138.80]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72407a571ccsm9710542b3a.196.2024.11.11.16.51.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Nov 2024 16:51:47 -0800 (PST) Received: by archie.me (Postfix, from userid 1000) id C5E5B4209E61; Tue, 12 Nov 2024 07:51:43 +0700 (WIB) Date: Tue, 12 Nov 2024 07:51:43 +0700 From: Bagas Sanjaya To: Konstantin Aladyshev , andriy.shevchenko@linux.intel.com Cc: Jean Delvare , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] docs: i2c: piix4: Add ACPI section Message-ID: References: <20241111140231.15198-1-aladyshev22@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="qhBYF6HTZwxQb3Tk" Content-Disposition: inline In-Reply-To: <20241111140231.15198-1-aladyshev22@gmail.com> --qhBYF6HTZwxQb3Tk Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Nov 11, 2024 at 05:02:31PM +0300, Konstantin Aladyshev wrote: > diff --git a/Documentation/i2c/busses/i2c-piix4.rst b/Documentation/i2c/b= usses/i2c-piix4.rst > index 07fe6f6f4b18..90447dff7419 100644 > --- a/Documentation/i2c/busses/i2c-piix4.rst > +++ b/Documentation/i2c/busses/i2c-piix4.rst > @@ -109,3 +109,65 @@ which can easily get corrupted due to a state machin= e bug. These are mostly > Thinkpad laptops, but desktop systems may also be affected. We have no l= ist > of all affected systems, so the only safe solution was to prevent access= to > the SMBus on all IBM systems (detected using DMI data.) > + > + > +Description in the ACPI code > +---------------------------- > + > +Device driver for the PIIX4 chip creates a separate I2C bus for each of = its ports:: > + > + $ i2cdetect -l > + ... > + i2c-7 unknown SMBus PIIX4 adapter port 0 at 0b00 N/A > + i2c-8 unknown SMBus PIIX4 adapter port 2 at 0b00 N/A > + i2c-9 unknown SMBus PIIX4 adapter port 1 at 0b20 N/A > + ... > + > +Therefore if you want to access one of these busses in the ACPI code, po= rt subdevices > +are needed to be declared inside the PIIX device:: > + > + Scope (\_SB_.PCI0.SMBS) > + { > + Name (_ADR, 0x00140000) > + > + Device (SMB0) { > + Name (_ADR, 0) > + } > + Device (SMB1) { > + Name (_ADR, 1) > + } > + Device (SMB2) { > + Name (_ADR, 2) > + } > + } > + > +If it is not the case for your UEFI firmware and you don't have access t= o the source > +code, you can use ACPI SSDT Overlays to provide the missing parts. Just = keep in mind > +that in this case you would need to load your extra SSDT table before th= e piix4 driver > +start, i.e. you should provide SSDT via initrd or EFI variable methods a= nd not via > +configfs. > + > +As an example of usage here is the ACPI snippet code that would assign j= c42 driver > +to the 0x1C device on the I2C bus created by the PIIX port 0:: > + > + Device (JC42) { > + Name (_HID, "PRP0001") > + Name (_DDN, "JC42 Temperature sensor") > + Name (_CRS, ResourceTemplate () { > + I2cSerialBusV2 ( > + 0x001c, > + ControllerInitiated, > + 100000, > + AddressingMode7Bit, > + "\\_SB.PCI0.SMBS.SMB0", > + 0 > + ) > + }) > + > + Name (_DSD, Package () { > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), > + Package () { > + Package () { "compatible", Package() { "jedec,jc-42.4-te= mp" } }, > + } > + }) > + } Looks good, thanks! Reviewed-by: Bagas Sanjaya --=20 An old man doll... just what I always wanted! - Clara --qhBYF6HTZwxQb3Tk Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCZzKmmwAKCRD2uYlJVVFO o6lkAQC2YG+wRNNVrbkIL8gpUWUTAZhOEbKw4zsaqGyOfQfhIgD7BXFqBfMr3wu4 6RPBVeocE2oD3/tatDuVdi9fB/4hvAA= =G+tH -----END PGP SIGNATURE----- --qhBYF6HTZwxQb3Tk--