Re: [PATCH v9 2/2] i2c: riic: Recover from arbitration loss

[Wolfram Sang <wsa+renesas@sang-engineering.com>]

[-- Attachment #1.1: Type: text/plain, Size: 626 bytes --]


> From 10µs to 50µs, the clock pulses are part of the recovery sequence.

Ahh, that explains. I thought this was all after the recovery.

> Around 55µs, the transfer function starts attempting to send data
> hence the clock pulse.

The short SCL spike around 55us is still strange. However, we might
violate t:buf time between STOP and START. Can you please try the
attached WIP patch?

> The slave device is versa clock geberator 5P35023 (exact part number
> on SMARC RZ/G2L 5P35023B-629NLGI)

Hmm, G3S has a versa clock generator as well. But I can't find a way to
wire GPIO lines to RIIC1 or I2C_PM.


[-- Attachment #1.2: buf --]
[-- Type: text/plain, Size: 410 bytes --]

diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 7ad1ad5c8c3f..42058c789f3f 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -278,6 +278,8 @@ int i2c_generic_scl_recovery(struct i2c_adapter *adap)
 		}
 	}
 
+	ndelay(RECOVERY_NDELAY / 2);
+
 	/* If we can't check bus status, assume recovery worked */
 	if (ret == -EOPNOTSUPP)
 		ret = 0;

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]