Re: [PATCH RESEND v5 2/2] i2c: spacemit: add support for SpacemiT K1 SoC

Yao Zi
2025-03-03T07:11:56Z

On Mon, Mar 03, 2025 at 07:08:41AM +0100, Wolfram Sang wrote:
>
> > +/* spacemit i2c registers */
> > +#define SPACEMIT_ICR 0x0 /* Control Register */
> > +#define SPACEMIT_ISR 0x4 /* Status Register */
> > +#define SPACEMIT_IDBR 0xc /* Data Buffer Register */
> > +#define SPACEMIT_IBMR 0x1c /* Bus monitor register */
> > +
> > +/* register SPACEMIT_ICR fields */
> > +#define SPACEMIT_CR_START BIT(0) /* start bit */
> > +#define SPACEMIT_CR_STOP BIT(1) /* stop bit */
> > +#define SPACEMIT_CR_ACKNAK BIT(2) /* send ACK(0) or NAK(1) */
> > +#define SPACEMIT_CR_TB BIT(3) /* transfer byte bit */
>
> This looks like a lot like a variant of the i2c-pxa register set. Has it
> been considered to reuse that driver?
>

Reusing existing driver has been discussed earlier[1] and the answer was
no. It really has been a long time.

Thanks,
Yao Zi

[1]: https://lore.kernel.org/all/6015d35d-6d91-4ac1-8ebf-4f79b304370f@gmail.com/