From: <Conor.Dooley@microchip.com>
To: <wsa@kernel.org>, <Conor.Dooley@microchip.com>,
<linux-i2c@vger.kernel.org>, <ben.dooks@codethink.co.uk>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<Daire.McNamara@microchip.com>
Subject: Re: [PATCH v6 1/2] i2c: add support for microchip fpga i2c controllers
Date: Wed, 6 Jul 2022 08:03:26 +0000 [thread overview]
Message-ID: <ac070176-93b9-3bc4-5589-ec57d4d38af4@microchip.com> (raw)
In-Reply-To: <YsU3eLA3PrceFS65@shikoro>
On 06/07/2022 08:19, Wolfram Sang wrote:
> Hi Conor,
>
> thank you for sending this driver.
>
> On Tue, Jun 21, 2022 at 08:42:38AM +0100, Conor Dooley wrote:
>> Add Microchip CoreI2C i2c controller support. This driver supports the
>> "hard" i2c controller on the Microchip PolarFire SoC & the basic feature
>> set for "soft" i2c controller implemtations in the FPGA fabric.
>>
>> Co-developed-by: Daire McNamara <daire.mcnamara@microchip.com>
>> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> Where are the bindings? Are they already on the way upstream?
>
>> drivers/i2c/busses/i2c-microchip-core.c | 486 ++++++++++++++++++++++++
>
> The biggest remark I have is to rename the driver a little. Usually a
> "-core" suffix means that there are other drivers like "-platform" or
> "-pci" use this core. Would "i2c-microchip-fpga" or
> "i2c-microchip-corei2c" work for you?
I'd prefer the latter. Being called "core" is unfortunate and I
did think about that. i2c-microchip-corei2c would have been my
first choice but I thought the double usage of i2c would've been
disapproved of haha
>
>> +#include <linux/clk.h>
>> +#include <linux/clkdev.h>
>> +#include <linux/err.h>
>> +#include <linux/i2c.h>
>> +#include <linux/iopoll.h>
>
> Do you really need that?
Nope!
>
> ...
>
>> +static irqreturn_t mchp_corei2c_handle_isr(struct mchp_corei2c_dev *idev)
>> +{
>> + u32 status = idev->isr_status;
>> + u8 ctrl;
>> + bool last_byte = false, finished = false;
>> +
>> + if (!idev->buf)
>> + return IRQ_NONE;
>> +
>> + switch (status) {
>> + case STATUS_M_START_SENT:
>> + case STATUS_M_REPEATED_START_SENT:
>> + ctrl = readb(idev->base + CORE_I2C_CTRL);
>> + ctrl &= ~CTRL_STA;
>> + writeb(idev->addr, idev->base + CORE_I2C_DATA);
>> + writeb(ctrl, idev->base + CORE_I2C_CTRL);
>> + if (idev->msg_len <= 0)
>> + finished = true;
>
> How can it happen that len is < 0? Wouldn't that be an error case?
>
> ...
>
>> +static u32 mchp_corei2c_func(struct i2c_adapter *adap)
>> +{
>> + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
>
> Have you testes SMBUS_QUICK as well?
Not specifically SMBUS_QUICK, but I did test with hardware
that uses "zero-length" messages.
>
> ...
>
>> + idev->dev = &pdev->dev;
>> + init_completion(&idev->msg_complete);
>> + spin_lock_init(&idev->lock);
>
> You never use this lock.
And nor did we in any prior version (pre-list).
I am just going to remove it.
>
> ...
>
>> + idev->adapter.owner = THIS_MODULE;
>> + idev->adapter.algo = &mchp_corei2c_algo;
>> + idev->adapter.dev.parent = &pdev->dev;
>> + idev->adapter.dev.of_node = pdev->dev.of_node;
>> + idev->adapter.timeout = MICROCHIP_I2C_TIMEOUT;
>
> Simply use HZ here?
Sure.
Thanks for the review :)
next prev parent reply other threads:[~2022-07-06 8:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-21 7:42 [PATCH v6 1/2] i2c: add support for microchip fpga i2c controllers Conor Dooley
2022-06-21 7:42 ` [PATCH v6 2/2] MAINTAINERS: add the polarfire soc's i2c driver Conor Dooley
2022-07-06 7:21 ` Wolfram Sang
2022-07-06 7:41 ` Conor.Dooley
2022-07-06 7:19 ` [PATCH v6 1/2] i2c: add support for microchip fpga i2c controllers Wolfram Sang
2022-07-06 8:03 ` Conor.Dooley [this message]
2022-07-06 10:32 ` Wolfram Sang
2022-07-06 10:50 ` Conor.Dooley
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