Re: [PATCH 00/13] Analog Devices Inc. Automotive Audio Bus (A2B) support

Alvin Šipraga
2024-05-21T07:08:18Z

On Fri, May 17, 2024 at 04:57:57PM GMT, Wolfram Sang wrote:
>
> > On subordinate nodes the I2C interface functions in controller
> > (master) mode, providing an additional I2C adapter to the host for
> > each subordinate node connected to the A2B bus.
>
> I am not sure I got this right? That would mean for an I2C adapter on a
> subordinate node, that there might be targets connected to only that
> subordinate node? How do its messages go to the host machine? Is I2C
> encapsulated over I2C? I probably missed something.
>

Yes, each subordinate node exposes a whole discrete I2C segment, so you
can have two targets with the same address connected to two different
subordinate nodes respectively. Hence a new i2c_adapter for each
subordinate node.

The way it works is that the main node responds on two I2C addresses,
typically 0x68 and 0x69, labelled "BASE" and "BUS" respectively. BASE
always addresses the register map of the main node. BUS is a "proxy" and
addresses either the register map of a subordinate node, or a given
peripheral connected to the targetted subordinate node. This is
configured in some register fields of the main/subordinate nodes.

When addressing a target connected to the I2C controller of a
subordinate node, a register field of the given subordinate node must be
populated with the target's I2C address. The hardware will then proxy
I2C messages towards the main node's BUS address over the A2B bus
through to the selected subordinate node's I2C controller interface, and
will rewrite the address (BUS, 0x69) to whatever target address was
programmed into that subordinate node. The I2C interface of the main
node performs clock stretching so that the transfer is synchronous and
transparent to the host.

You can see the implementation details in the ad24xx-i2c.c "interface
driver":

(a) main/subordinate node register map access: __ad24xx_i2c_read() and
__ad24xx_i2c_write()

(b) subordinate node I2C target access: __ad24xx_i2c_xfer()

A more detailed description of the logic can be found in [1] section 3-1
"I2C Port Programming Concepts":

[1] https://www.analog.com/media/en/technical-documentation/user-guides/ad242x-trm.pdf

Hope that clears it up.